Micron Technology Incorporated

Micron Electronics, Inc.

Don A Agneta

Carlton Gene Amdahl

Dennis Henry Smith

Michael G Henderson

Stephen E J Papa

Don Schiro

Don Shiro

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.

Method of providing an interface to a plurality of peripheral devices using bus adapter chips

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adapter chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one of the network interface modules is removed.

Methods of removing and replacing data processing circuitry are provided comprising removing a network interface module from the computer without powering down the computer and removing an interface card from the network interface module. The further acts of replacing the interface card into the network interface module and replacing the network interface module into the computer without powering down the network computer are also performed in accordance with this method.

Method for hot swapping of network components

A fault-tolerant computer system includes a processor and a memory, connected to a system bus. The system includes at least two mirrored circuits, at least two mirrored IO devices, a detection means and a re-route means. The two mirrored circuits each include an interface to the system bus, and an IO interface. The input/output interface of each of the mirrored circuits is connected to one of the two mirrored IO devices. Detection means detect a load imbalance in the data transfer between the system bus and either one of the two mirrored IO devices. In response to the detection of a load imbalance, the re-route means re-routes the data transfer between the system bus and the other one of the two mirrored IO devices. In another embodiment, a fault-tolerant computer system includes a first, second and third IO bus, legacy devices, and two IO devices. The first IO bus is connected to the system bus. The legacy devices are connected to the first IO bus. The second and third IO buses are each connected to the system bus. The IO devices are each connected to a corresponding one of the second and third IO buses. An other embodiment of the invention can be characterized as an apparatus for transferring data between at least one transport protocol stack and a plurality of network adapters coupled to a computer network that supports recovery from network adapter and a connection failure.

Three bus server architecture with a legacy PCI bus and mirrored I/O PCI buses

A system for expanding the loading capacity of a PCI bus in an information processing system having a multiple bus architecture. In one embodiment, the system comprises a processor-to-PCI bridge connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. A plurality of add-in board connectors are coupled to each of the generated PCI buses. In another embodiment, the system comprises two or more processor-to-PCI bridges connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. The resulting system expands the loading capacity of a PCI bus while adding resistance to single point failures.

System for expanding PCI bus loading capacity

A method for expanding the loading capacity of a PCI bus in an information processing system having a multiple bus architecture. In one embodiment, the method comprises connecting a processor-to-PCI bridge to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. A plurality of add-in board connectors are coupled to each of the generated PCI buses. In another embodiment, the method comprises connecting two or more processor-to-PCI bridges to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. The resulting system expands the loading capacity of a PCI bus while adding fault-tolerance and resistance to single point failures.

Method of expanding bus loading capacity

A network server includes removable network interface modules mounted in a chassis. The network interface modules connect to a CPU through an interconnection assembly module. The network interface modules may comprise removable canisters containing a plurality of interface cards.

Growing community of inventors

Morgan Hill, CA, United States of America

Don A Agneta