International Business Machines Corporation

Bull Sas

Dominique Rigal

Daniel Orsatti

Ange Aznar

Fabrice Jean Verplanken

Jean L Calvignac

Jean-Claude Zunino

Bruno Rousseau

Jose Iruela

Laurent Marliac

Pierre Axel Lagadec

Claude Basso

Jean-Luc Frenoy

Maurice Cukier

Daniel Pilost

Mathieu Michel Girard

Vivian Blanchard

Saïd Derradji

Luc Torres

Jean Claude Zunino

Disclosed is a method for test traffic generation, at test-sending switches for a network of calculation nodes, and of inspection of this test traffic, at test-receiving switches of this network, including: the generation and sending of test traffic, at least at a selected test-sending input or output port of one selected test-sending switch, sent to at least one selected test-receiving input or output port of a selected test-receiving switch, where the test traffic is generated and sent by a traffic generation component configured as an additional input of the selected test-sending input or output port, where the test traffic is inspected by a traffic inspection component configured for filtering the output of the selected test-receiving input or output port.

Method for test traffic generation and inspection, and associated switch input or output port and switch

A method for sending data, from an upstream device to a downstream device, including sending a piece of data from one among a plurality of virtual channels sharing the same input buffer memory of the downstream device, if this virtual channel uses a number of memory locations of the input buffer memory strictly less than a current ceiling. It further comprises measuring a communication latency between the upstream and downstream devices, and calculating the current ceiling from the measured latency.

Method for sending by an upstream device to a downstream device data from a virtual channel sharing a same input buffer memory of the downstream device, corresponding computer program and system

A method and system for transmitting a loopback cell within an ATM connection. The method comprises the steps of detecting in an input adapter whether or not an incoming ATM cell includes a loopback condition indicator. If so, specific routing labels are appended to the incoming ATM cell indicating that the incoming cell is a loopback cell to be looped back on the connection such that the switch engine of the switching node transfers the loopback cell to the same port of the input adapter utilizing the appended routing labels.

Method for transmitting loopback cells through a switching node of an asynchronous transfer mode (ATM) network

A method and system for injecting/extracting a control cell into/from a data connection transmitted from a source switching node to a destination switching node of an Asynchronous Transfer Mode (ATM) network. The injecting method consists in adding to the ATM cell a switch routing label (SRL) and a protocol engine correlator (PEC) by the control point of the injection switching node before injecting the cell into the connection. The extracting method consists in setting a control flag in the control block of the incoming cell if this cell includes an extraction condition indicating that it is a control cell to be extracted, and adding to the control cell a switch routing label corresponding to the control point (CP SRL) and a reserved static protocol engine correlator (SPEC).

Method of injecting/extracting control cells in an asynchronous transfer mode (ATM) network

A system and method for freezing a processing unit to facilitate on-line debugging of a protocol engine within a switching node of a data transmission network. In accordance with the system of the present invention, the protocol engine includes a plurality of processing units such as an identification unit, a lookup unit, a traffic management and congestion unit, an enqueue unit, a dequeue unit, a traffic management scheduling unit, a frame transmission unit, a control unit, and a control block unit. The control block unit includes a freeze register containing multiple freeze bits, wherein each freeze bit is associated with one processing unit. In response to setting a freeze bit, resources and settings of a processing unit associated with the set freeze bit are prevented from being changed by the processing unit.

On-line debugging system in a switching node of a data transmission network

A system and method for selecting one port among multiple output ports having various transmission rates attached to an output adapter of a switching node in a data transmission network and enabling it to transmit its data over the network. The system of the present invention includes a storage device that contains a list of identification codes for the ports. The identification code list is arranged in a prioritized order from the port having the highest transmission rate to the port having the lowest transmission rate. The system further includes port service request means that generate a service request signal for each port, wherein the service request signal has a frequency corresponding to the transmission rate of the object port. Port selection means are utilized to, in response to said identification codes and said service request signal, select a requesting port having a highest priority according to its identification code and enabling the selected port to transmit data over the date transmission network.

System and method for selecting multi-rate ports in a data transmission network

The invention discloses a method and an apparatus for use in high speed networks such as Asynchronous Transfer Mode (ATM) networks providing support for processing multipriority data flows at media speed, the major constraint being to share the storage and the ALU between all the tasks. The invention consists first in grouping the tasks in processes and the processes in set of processes all organized in decreasing order of their priority ; `on the fly`interruption of a lower priority process/set of processes by a higher priority process/set of processes is possible as well as reuse of the shared resources during task void states inactive in a process or between processes. In the preferred embodiment of the invention, the support of the reserved bandwidth and non reserved bandwidth ATM services data flows requires two different groups of processes, the highest priority being for the group of processes serving the reserved bandwidth service. With the principle of the invention when used in network equipment the media speed is sustained and many different network traffics can be simultaneously supported. The apparatus implementing the solution of the invention, allowing sharing of resources saves place and costa by the improved reduced number of sophisticated hardware components such as static memories and programmable logic circuits.

Method and apparatus to share resources while processing multiple

An ATM switch includes one or more adapters having input ports and/or output ports and a switching fabric for switching Asynchronous Transfer Mode (ATM) cells received at the input ports to the output ports. To maintain switch throughput, cells are categorized either as real time (high priority) or non-real time (lower priority) cells. High priority cells are processed using a first set of cell processing logic at a rate at least equal to the rate at which the cells are received on the input ports. Lower priority cells are processed using a second set of cell processing logic only when no high priority cells are being processed.

Method and apparatus for priority level queueing in processing ATM cell

A multicasting apparatus and method for an Asynchronous Transfer Mode (ATM) switch is described, which uses a single target port (TP) vector attached to each outgoing ATM cell. The target port vector contains identifiers of each port to which the cell has to be transmitted. After transmission of the cell, the identifier relating to respective target port is erased from the TP vector. Hence the TP vector contains only identifiers of target port to which the cell has not yet been transmitted. When the TP vector contains no identifiers, the storage location at which the ATM cell is stored during the transmission, is freed for another cell. Unicast and multicast traffic are treated identically.

ATM cell multicasting method and apparatus

The techniques required to switch an ATM cell between an input adapter and an output adapter are enhanced by performing two look-up operations. The first look-up operation is performed in the input adapter which receives the cell to be switched. The first look-up operation retrieve the address of the target output port and a connection control block. The second look-up operation is performed in the target output adapter and makes use of the results of the input adapter search to retrieve the information need to complete the transfer of the cell to the target output port.

ATM cell forwarding and label swapping method and apparatus

Data multiplexing system for dispatching an input serial bit stream onto a plurality of ports, or multiplexing the data bits received from a plurality of ports as a serial bit stream. The system mainly comprises for each port, a mask register (14) loaded with a N-bit mask work wherein bits set to 1 indicate which bits of an aggregate register (10 or 56) are to be loaded or to be transferred, and a scan counter (20 or 46) starting being incremented at a high frequency at each transition of a first category, up or down, of a clock circuit (12 or 40), until the mask bit corresponding to the scan counter contents is a bit 1, whereby the corresponding cell of the aggregate register is transmitted to the associated port or loaded with the bit received at this time by the associated port.

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Nice, France

Dominique Rigal