The Royal Institution for the Advancement of Learning / Mcgill University

Dominique Lemoine

Frederic Nabki

Mourad El-Gamal

Paul-Vahe Cicek

It would be beneficial to integrate MEMS devices with silicon CMOS electronics, package them in controlled environments, e.g. vacuum for MEMS resonators, and provide industry standard electrical interconnections such as solder bumps. However, to do so requires through-wafer via-based electrical interconnections. However, the fragile nature of the MEMS devices, the requirement for vacuum, hermetic sealing, and the stresses placed on metallization membranes are not present in conventional CMOS packaging. Accordingly there is provided a means of reinforcing through-wafer vias for integrated MEMS-CMOS circuits by in-filling the through-wafer electrical vias with low temperature deposited ceramic materials deposited with processes compatible with post-processing of CMOS electronics. Beneficially ceramics such as silicon carbide provide enhanced mechanical strength, enhanced expansion matching, and increased thermal conductivity in comparison to silicon and solder materials. The ceramic reinforcing may be further adapted to include micro-channels for the provisioning of liquid cooling through the structures.

Low-temperature wafer level processing for MEMS devices

Microelectromechanical systems (MEMS) are small integrated devices or systems that combine electrical and mechanical components. It would be beneficial for such MEMS devices to be integrated with silicon CMOS electronics and packaged in controlled environments and support industry standard mounting interconnections such as solder bump through the provisioning of through-wafer via-based electrical interconnections. However, the fragile nature of the MEMS devices, the requirement for vacuum, hermetic sealing, and stresses placed on metallization membranes are not present in packaging conventional CMOS electronics. Accordingly there is provided a means of reinforcing the through-wafer vias for such integrated MEMS-CMOS circuits by in filling a predetermined portion of the through-wafer electrical vias with low temperature deposited ceramic materials which are deposited at temperatures below 350&#xb0; C., and potentially to below 250&#xb0; C., thereby allowing the re-inforcing ceramic to be deposited after fabrication of the CMOS electronics.

Growing community of inventors

St. Leonard, Canada

Dominique Lemoine