Sgs-thomson Microelectronics S.r.l.

Stmicroelectronics S.r.l.

Sgs Microelettronica Spa

Sgs-thomson Microelectronics Limited

Siemens Automotive S.a.

Domenico Rossi

Claudio Diazzi

Carlo Cini

Giorgio Pedrazzini

Paolo Cordini

Giulio Ricotti

Marco M Monti

Andrea Mario Onetti

Giovanni Pietrobon

Andrea Cuomo

Roberto Bardelli

Davide Giuseppe Patti

Guido Torelli

Franco Maloberti

Mario Paparo

Paola Galbiati

Massimo Pozzoni

Sandro Storti

Alberto Salina

Michele Palmieri

Kazuyuki Tanaka

Luca Bertolini

Marc Simon

Salvatore Pappalardo

Ermes Viani

Carla Vacchi

Hisashi Tahara

Masayuki Tateoka

Giuseppe Scrocchi

A spark plug, including an insulator embedding a first metallic electrode axially extending therethrough from a high voltage outer end terminal to the center of the inner end of the insulator from which it protrudes; a metallic ground electrode isolated from the first electrode and having an extended inner termination facing toward the first electrode extending from the insulator tip for defining therebetween a spark gap, a resistive element connected to the ground electrode such that upon mounting the spark plug in an internal combustion engine, the ground electrode electrically connects to the engine body through the resistive element; and a second outer termination of the ground electrode, adapted to constitute an accessible sensing terminal.

Enhanced method of sensing ionization current in spark ignition internal combustion engines and related spark plug structures

A voltage, replica of the difference between two dissimilar base-emitter voltages in the form of an intrinsic input offset voltage of a differential input pair of transistors of a noninverting, buffer-configured operational amplifier, is summed with a pre-established fraction of a base-emitter voltage, to produce a voltage reference without thermal drift of a level that can be as low as few 10 mV. The intrinsic input offset voltage is controlled by a local feedback loop acting on the bias current that is forced through the input pair of transistors that may be realized with a certain area ratio. The relatively simple circuit is useful in battery operated, low supply voltage, systems.

Low voltage, band gap reference

In a junction isolated integrated circuit including power DMOS transistors formed in respective well regions or in an isolated epitaxial region on a substrate of opposite type of conductivity, circuits are formed in a distinct isolated region sensitive to oversupply and/or belowground effects. These effects are caused by respective power DMOS transistors coupled to the supply rail or ground. These effects are alternatively controllable by specifically shaped layout arrangements, and may be effectively protected from both effects. This is achieved by interposing between the region of sensitive circuits and the region containing the power DMOS transistors for which the alternatively implementable circuital arrangements are not formed, the region containing the power DMOS transistors coupled to the supply rail or to a ground rail for which the alternatively implementable arrangements are formed. The special interposition separates and shields the sensitive circuits from the power device whose oversupply or belowground effect is not countered by specific circuit arrangements.

Belowground and oversupply protection of junction isolated integrated circuits

An integrated circuit having a passive circuit component that can be adjusted following the manufacturing process to provide a precise absolute value for resistance or capacitance. A plurality of passive elements are selectively combinable using logic gates to include or exclude each element from a network, wherein the combined value of the included passive elements equals the value of the passive circuit component. The logic gates are set by outputs from a decoder to reduce the required inputs to the chip.

Integrated circuit with trimmable passive components

A circuit for modifying a resonant frequency of a receiver for radio frequency signals. The receiver includes an inductor connected in parallel with a capacitor. The circuit includes a switch having an additional capacitor connected between two MOS transistors, the switch being connected in parallel with the receiver to add capacitance based on a control of the MOS transistors.

Electronic cord and circuit with a switch for modifying the resonant

The switch of this invention has two conduction terminals and basically consists of the parallel coupling, across the two conduction terminals, of a first N-channel MOS transistor and second P-channel MOS transistor. The first MOS transistor will be conducting when the signal applied to the conduction terminals has a first polarity, and the second MOS transistor will be conducting when the signal applied to the conduction terminals has a second polarity. Advantageously, if two unidirectional conduction circuit elements are respectively connected in series with the main conduction paths of the two MOS transistors, the drain/body junctions of the latter will never be conducting regardless of the way the switch is connected.

Electrically controlled bidirectional AC switch, and an integrated

The dynamic range of operation of a differential transconductance input stage is reduced when the amplitude of the input signal decreases, thus reducing the level of the noise that is generated by the input stage. A DC signal representative of the sensed amplitude of the input signal is employed for either reducing the value of a common, emitter-degenerating resistance or of the bias current that is forced in the two branches of the differential input stage.

Differential transconductor stage dynamically controlled by the input

A DC--DC boost converter for directly driving a capacitive load employs four switches for cyclically commuting the connection configuration of an energy storing inductor. First and second switches are driven at a relatively high frequency and provide an impulsive charge path of the inductor by connecting one or the other end to a power supply rail. Third and fourth switches are driven in phase opposition to each other at a relatively low frequency and provide a discharge path from one and the other end of the inductor, respectively, toward an output node of the circuit to which the capacitive load is connected.

Boost converter for driving a capacitive load

A fully digital, current mode, PWM control is realized by employing two distinct comparators, both reading the voltage drop on a sensing resistance. The first comparator exerts an open-loop current mode control. The second comparator, establishing a second higher current threshold than the current threshold set by the first comparator, triggers a disabling circuit of the output power transistor for a preset period of time, when the current level through the output stage uncontrollably rises beyond the second threshold. This may occur because of an insufficient discharge from the load circuit inductance during off-phases of the output power transistor of the extra energy stored during switching delay periods of the first (open loop control) comparator. The frequency of the sequence of bursts may be precisely controlled to be well outside the frequency range of interest to prevent disturbances.

Dual threshold current mode digital PWM controller

A BiCMOS capacitive charge pump circuit for low supply voltage has a bipolar part, functionally reproducing a basic charge pump circuit and a CMOS part that comprises MOS transistors functionally connected in parallel with the driving switch toward ground potential of the charge transfer capacitance and in parallel with the output diode for substantially nullifying voltage drops on the respective bipolar components. A special driving circuit (T8, R2, I2), powered at the boosted output voltage (VOUT) responds to the rise of the voltage on the output node above a minimum level, as ensured by the bipolar part of the charge pump circuit, to drive said MOS transistors (M1, M2), thus allowing the output voltage to reach a level that is substantially double the supply voltage (Vs), even when the latter is exceptionally low, for reliably ensuring switching of the CMOS part of the circuit.

Capacitive charge pump, BiCMOS circuit for low supply voltage and method

The present invention relates to an integrated input/output interface for low and/or high voltage range signals of the digital and/or analog type. It comprises essentially a power amplification circuit block (2) having at least one low voltage range input terminal (A) and at least one high voltage range output terminal (B), and a second amplification circuit block (3) having a high voltage range input terminal connected to said high voltage range output terminal (B) and at least one low voltage range output terminal (D). A conventional circuit block (4) prevents a high voltage range signal being input to said high voltage range terminal (B) from propagating through the first power amplification circuit block (2), so that it only affects the second amplification circuit block (3). This interface is implemented in mixed high voltage bipolar/CMOS/DMOS technology.

Input/output interface circuit for digital and/or analog signals

A hysteresis comparator circuit working with a low voltage supply and of a type which includes a composite structure incorporating first and second differential cells respectively comprised of an npn bipolar transistor pair with common emitters, on the one side, and a pair of pnp bipolar transistor pair with common emitters, on the other, such cells being coupled together through the bases of the respective transistors. The circuit includes at least one pair of variable current sources associated with each cell and tied operatively to the voltage value present on the comparator output; in addition, a voltage divider is connected between each interconnection of the bases of the transistors forming the cells.

Hysteresis comparator circuit for operation with a low voltage power

A drive circuit having two electronic switches formed from N-MOS transistors is designed to alternatively connect the input of a preamplifier stage to a first or second read sensor on the read head of a magnetic tape. The drive circuit also has a third electronic switch formed from an N-MOS transistor which grounds the input of the preamplifier stage. Based on logic input signals, a control circuit switches the first and second switches, or closes the third switch and simultaneously opens the first and second switches.

Drive circuit for a magnetic cassette reader with auto reverse and mute

A stage of both input and output configurable for operation with low and high voltages, comprises:

Input/output adapted to operate with low and high voltages

A circuit for measuring current in a power MOS transistor (M0) comprises second (M1) and third (M2) transistors in series of the same type and same technology as, but having a smaller surface than, the power transistor and arranged in parallel on the latter. The two series transistors have their gates connected to the gate of the power transistor. The current in transistor (M2) which is connected to the reference electrode of the power transistor is measured.

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Cilavegna, Italy

Domenico Rossi