Georgia Tech Research Corporation

Do Kyung Hwang

Bernard Kippelen

Seth R Marder

Canek Fuentes-Hernandez

Lauren E Polander

Mathieu Fenoll

Jungbae Kim

Shree Prakash Tiwari

Raghunath R Dasari

Yulia A Getmanenko

A field-effect transistor includes a gate, a source and a drain; a semiconductor layer between the source and the drain; and a gate insulator between the gate and the semiconductor layer. The gate insulator comprises a first layer adjoining the semiconductor layer; and a second layer. The first layer is formed from an amorphous fluoropolymer having a first dielectric constant and a first thickness. The second layer has a second dielectric constant and a second thickness. The first dielectric constant is smaller than 3, the first thickness is smaller than 200 nm, the second dielectric constant is higher than 5, and the second thickness is smaller than 500 nm.

Multi-layer gate dielectric field-effect transistor and manufacturing process thereof

The various inventions and/or their embodiments disclosed herein relate to certain naphthalene diimide (NDI) compounds wherein the NDI groups are bonded to certain subclasses of bridging heteroaryl (hAr) groups, such as the 'NDI-hAr-NDI' oligomeric compounds, wherein hAr is a heteroaryl group chosen to provide desirable electronic and steric properties, and the possible identities of the 'R' terminal peripheral substituent groups are described herein. Transistor and inverter devices can be prepared.

Naphthalene-diimide-heterocycle-naphthalene diimide oligomers as organic semiconductors and transistors therefrom

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Duluth, GA, United States of America

Do Kyung Hwang