Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Industry-university Cooperation Foundation Hanyang University

Other

Seoul National University

Samsung Corning Precision Materials Co., Ltd.

Samsung Corning Advanced Glass, LLC

Bovia, Inc.

Iucf-hyu

Do-Hyun Kim

Je-Hun Lee

Chang-Oh Jeong

Kap-Soo Yoon

Ki-Won Kim

Dong-Hoon Lee

Woo-Geun Lee

Eun-Guk Lee

Pil-Sang Yun

Seung-Ha Choi

Dong-Ju Yang

Sung-Hoon Yang

Jae-Ho Choi

Young-Joo Choi

Sung Haeng Cho

Kyoung-Jae Chung

Tae-Hyung Ihn

Young-Wook Lee

Hye-Young Ryu

Jae-Hyoung Youn

Sang Ho Park

Cheol Kyu Kim

Bong-Kyun Kim

Chong Sup Chang

Yoon Ho Khang

Jung Kyu Lee

Yong-Su Lee

Kyung Suk Oh

Se Hwan Yu

Dong Jo Kim

Hwa-Yeul Oh

Yong-Mo Choi

Byoung-June Kim

Kyung-Seok Son

Jae Woo Park

Chang-jung Kim

Sang-Wook Kim

Ki-Hun Jeong

Dong Hoon Lee

Tae-sang Kim

Sung-hoon Lee

Xinxing Li

Seung-Jae Jung

Hyun-Jung Lee

SunWon Kang

Young Joo Choi

Seung-Mi Seo

Je-Min Choi

Soon-Kwon Lim

Jun Hyun Park

Junhyun Park

Jeong-Min Park

Hong-Sick Park

Wonhee Lee

Kyu-Seok Kim

Suk-Won Jung

Byeong-Beom Kim

Soo-Jung Ryu

Sun-Young Hong

Sang-Heon Lee

Sang Won Shin

Sang-Moon Moh

Yeon-Gon Cho

Woo-Seok Jeon

Gwang-bum Ko

Won-young Kim

Jun-Hyun Park

Won-Suk Shin

Sung-Haeng Cho

Hee-Tae Kim

Yang-Sun Kim

O-Sung Seo

Woogeun Lee

Jong-Nam Lee

Yoon Gyu Lee

Sangho Lim

Dongjo Kim

Chanwoo Yang

Hogeon Song

Yeong-gil Shin

Hyun-Jung Cho

Minkyeong Park

Joongeol Kim

Chan-Woo Yang

Sunwon Kang

Jin Ho Hwang

Jeong-Ju Park

Xun Zhu

Doohyoung Lee

Wonju Kim

Xin-Xing Li

Insung Sohn

Jaewoo Park

Woo Song Kim

Jeongju Park

Byeong-Hun Lee

Youngjoo Choi

GwonHeon Ryu

Juok Park

Sangwon Yoon

A semiconductor package includes a substrate, a first semiconductor chip on the substrate, a second semiconductor chip on the first semiconductor chip and a connection structure. The second semiconductor chip includes a first segment that protrudes outwardly beyond one side of the first semiconductor chip and a second connection pad on a bottom surface of the first segment of the second semiconductor chip. The connection structure includes a first structure between the substrate and the first segment of the second semiconductor chip and a first columnar conductor penetrating the first structure to be in contact with the substrate and being disposed between the second connection pad and the substrate, thereby electrically connecting the second semiconductor chip to the substrate.

Substrate assembly semiconductor package including the same and method of manufacturing 1HE semiconductor package

The present invention relates to pharmaceutical compositions for preventing or treating pulmonary metastasis of cancer. More specifically, the present invention relates to compositions that enhance anti-cancer immunity of the lung rather than induce death of advanced cancer, thus being effective in inhibiting, preventing or treating pulmonary metastasis of cancer.

Pharmaceutical compositions for preventing or treating pulmonary metastasis of cancer including CHI3L1 inhibitor as active ingredient

A semiconductor package may include a substrate including a first coupling terminal and a second coupling terminal, a first chip disposed on the substrate, the first chip including a first pad and a second pad, and a connection structure connecting the first coupling terminal to the first pad. A portion of the connection structure may be in contact with a first side surface of the first chip. The connection structure may include a connection conductor electrically connecting the first pad to the first coupling terminal.

Semiconductor package

An inspection system for a semiconductor package includes an inspection apparatus that includes a stage on which the semiconductor package is loaded, and a computer coupled to the inspection apparatus. The semiconductor package may include a first semiconductor chip and a second semiconductor chip on the first semiconductor chip, the computer may provide first identification information about the first semiconductor chip and second identification information about the second semiconductor chip, and the computer may control the inspection apparatus to selectively perform a package test process on one of the first and second semiconductor chips, the one of the first and second semiconductor chips being identified as a good chip based on the first identification information and the second identification information.

Inspection system and method for inspecting semiconductor package, and method of fabricating semiconductor package

A scroll compressor includes a fixed scroll including a fixed mirror-like surface and a fixed wrap that is extended from the fixed mirror-like surface, formed in a hybrid curve, and includes a thick portion thicker than other portions; an orbiting scroll including an orbiting mirror-like surface and an orbiting wrap extended from the orbiting mirror-like surface and formed in a hybrid curve; and a rotating shaft configured to rotate the orbiting scroll, wherein the orbiting scroll revolves relative to the fixed scroll. A center of a curve of a center portion of the fixed wrap is located at a position offset by a predetermined distance in a direction of reducing a thickness of the thick portion of the fixed wrap from a center of the fixed mirror-like surface, and a center of a curve of a center portion of the orbiting wrap is offset to correspond to the fixed wrap.

Scroll compressor with improved scroll curves

Substrate assembly semiconductor package including the same and method of manufacturing the semiconductor package

A display substrate is provided. The display substrate includes a gate interconnection disposed on an insulating substrate, an oxide semiconductor pattern disposed on the gate interconnection and including an oxide semiconductor, and a data interconnection disposed on the oxide semiconductor pattern to interconnect the gate interconnection. The oxide semiconductor pattern includes a first oxide semiconductor pattern having a first oxide and a first element and a second oxide semiconductor pattern having a second oxide.

Display substrate including thin film transistors having a multilayered oxide semiconductor pattern

A thin film transistor array panel, including: a first insulating substrate; a gate line disposed on the first insulating substrate and including a gate electrode; a semiconductor layer disposed on the gate electrode; a data conductor layer disposed on the semiconductor layer, and including a data line crossing the gate line, a source electrode connected to the data line and exposing at least a part of the semiconductor layer, and a drain electrode facing the source electrode; a capping layer disposed on the data conductor layer, the semiconductor layer exposed between the source electrode and the drain electrode, and the entire surface of the first insulating substrate; and a first passivation layer disposed on the capping layer. The capping layer and the semiconductor layer include the same material.

Thin film transistor array panel, liquid crystal display including the same, and manufacturing method thereof

The present disclosure is directed to providing: a new cell-penetrating peptide; and a composition for delivering a biologically active substance, a composition for gene therapy, a method for delivering a biologically active substance and a method for gene therapy using the same. The cell-penetrating peptide of the present disclosure can effectively deliver a protein into human cells and tissues, can deliver a protein with higher efficiency in comparison with a TAT peptide that is commercially used as a cell-penetrating peptide, and can also be usefully used in delivering a biologically active substance such as a protein, a genetic material, a chemical compound, etc. which may be used for a therapeutic purpose into cells.

Cell penetrating peptide and method for delivering biologically active substance using same

A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.

Thin film transistor array substrate and method of manufacturing the same

A thin film transistor include a control electrode, a semiconductor layer on the control electrode, an input electrode, at least a portion of the input electrode being on the semiconductor layer, and an output electrode spaced apart from the input electrode, at least a portion of the output electrode being on the semiconductor layer. Each of the input electrode and the output electrode includes a wiring layer including a metal material, a dummy portion on a side part of the wiring layer, the dummy portion including an oxide of the metal material, and a protection layer on the wiring layer, the protection layer overlapping the wiring layer and the dummy portion.

Thin film transistor, display substrate having the same, and method of manufacturing the same

A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Thin film transistor array panel and manufacturing method thereof

Disclosed is a refractory coating composition, which includes: based on the total weight of the composition, (a) 20 to 40 wt % of cement, (b) 15 to 40 wt % of ground-granulated blast-furnace slag, (c) 5 to 20 wt % of at least one selected from among mica and alumina, (d) 0 to 10 wt % of flyash from a fluidized-bed boiler, (e) 10 to 40 wt % of expanded vermiculite, (f) 10 to 30 wt % of at least one selected from among calcium carbonate and limestone, and (g) 0.5 to 20 wt % of a thickening agent, and which also has a predetermined porosity and thus an appropriate density, is non-shrinkable to thus reduce cracking due to shrinkage, and exhibits drastically increased resistance to heat in the event of a fire.

Refractory coating composition including novel heat-resistant materials

The present invention discloses a thin film transistor (TFT), a method for manufacturing the TFT, and a display substrate using the TFT that may prevent degradation of the characteristics of an oxide semiconductor contained in the TFT by blocking external light from entering a channel region of the oxide semiconductor. The TFT includes an oxide semiconductor layer; a protective layer overlapping a channel region of the oxide semiconductor layer; an opaque layer disposed between the oxide semiconductor layer and the protective layer; a source electrode contacting a first side of the oxide semiconductor layer; a drain electrode contacting a second side of the oxide semiconductor layer and facing the source electrode across the channel region; a gate electrode to apply an electric field to the oxide semiconductor layer; and a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer.

Display substrate, method of manufacturing the same

Growing community of inventors

Seoul, South Korea

Do-Hyun Kim