Skhynix Inc.

Do Hyeong Lee

Min Kyu Choi

Yu Jung Lee

Yong Seok Oh

Hee Chan Shin

Young Ho Ahn

Bo Kyeong Kim

Jae Gwang Lee

An electronic device may include a storage device including a memory device configured to store data which includes map data including a plurality of map segments and a memory controller configured to be in communication with the memory device; and a host device configured to be in communication with the storage device and structured to include a host memory and configured to transmit, to the storage device, a request for one or more of the plurality of map segments from the storage device, wherein the memory controller of the storage device is configured to provide the one or more map segments to the host memory in the host device in response to the request from the host device, and wherein the host device is configured to transmit, to the storage device, a command requesting access to the memory device based on the one or more map segments.

Storage device, host device, and electronic device to manage data corresponding to changed mapping information

A memory system according to the present technology may include a plurality of memory devices including a plurality of blocks configured of memory cells and a memory controller configured to control the plurality of memory devices corresponding to a plurality of zones by configuring the plurality of zones with the plurality of blocks included in each of the plurality of memory devices, wherein the memory controller is further configured to: receive a write request from a host, determine a target zone indicated by the write request among the plurality of zones, and determine a logical address of the target zone on which a write operation is to be started based on a write pointer and an offset corresponding to the target zone.

Memory comprising memory controller configured to determine a logical address of a target zone system and method of operating the memory controller

A memory system may include a memory device including at least one sequential area in which a data corresponding to consecutive logical addresses of the at least one sequential area is stored, a sequential buffer configured to temporarily store the data to be stored in the at least one sequential area, a meta buffer configured to store a meta data including a write pointer information indicating a logical address in which data is to be stored from among logical addresses corresponding to the at least one sequential area, and an area state information indicating whether the sequential buffer is allocated to the at least one sequential area, and a memory controller configured to perform a write operation of storing the data in the at least one sequential area in response to a first command received from the host using the meta data.

Memory system and method of operating the same

A memory system includes a nonvolatile memory set including a nonvolatile memory; and a memory controller configured to control the nonvolatile memory set. The memory controller may write data to a memory block in a target memory block pool in the nonvolatile memory set during a target time period existing between a time at which an operation mode for the nonvolatile memory set is changed from a second operation mode to a first operation mode and a time at which a command including information indicating that a host expects a requested operation to be performed in the first operation mode is received from the host, prevent execution of a background operation for the nonvolatile memory set, when the operation mode is the first operation mode, and control a background operation for the nonvolatile memory set to be executable, when the operation mode is the second operation mode.

Memory system, memory controller and method for operating memory controller

A memory system may transfer a reference write size for a memory device to a host, and, when receiving, from the host, a write request for first data having a size corresponding to a multiple of the reference write size, may directly write the first data to the memory device without caching the first data in a write cache.

Memory system, memory controller and method for operating memory system for determining whether to perform direct write based on reference write size

A memory system includes: a plurality of memory devices; a plurality of cores suitable for controlling the plurality of memory devices, respectively; and a controller including: a host interface layer for providing any one of the cores with a request of a host based on mapping between logical addresses and the cores, a remap manager for changing the mapping between the logical addresses and the cores in response to a trigger, a data swapper for swapping data between the plurality of memory devices based on the changed mapping, and a state manager for determining a state of the memory system depending on whether the data swapper is swapping the data or has completed swapping the data, and providing the remap manager with the trigger based on the state of the memory system and a difference in a degree of wear between the plurality of memory devices.

Growing community of inventors

Icheon-si, South Korea

Do Hyeong Lee