Snap Inc.

Dmitry Ryuma

Gerald Nilles

John James Robertson

Bo Ding

Samuel Ahn

Matthias Kalkgruber

Jason Heger

Anton Kondratenko

Patrick Timothy McSweeney Simons

Daniel Wolf

Dunxu Hu

Bernhard Jung

Farid Zare Seisan

David Ben Ezra

Edward Lee Kim-Koon

Alexander Sourov

Daniel Wagner

Sumant Milind Hanumante

Richard Zhuang

Patrick Timothy Mcsweeney Simons

Alexander Kane

Chintan Doshi

Devices and methods for dynamic power configuration (e.g., reduction) for thermal management (e.g., mitigation) in a wearable electronic device such as an eyewear device. The wearable electronic device monitors its temperature and, responsive to the temperature, configures the services it provides to operate in different modes for thermal mitigation (e.g., to prevent overheating). For example, based on temperature, the wearable electronic device adjusts sensors (e.g., turns cameras on or off, changes the sampling rate, or a combination thereof) and adjusts display components (e.g., adjusted rate at which a graphical processing unit generates images and a visual display is updated). This enables the wearable electronic device to consume less power when temperatures are too high in order to provide thermal mitigation.

Eyewear device dynamic power configuration

Eyewear devices that include two SoCs that share processing workload. Instead of using a single SoC located either on the left or right side of the eyewear devices, the two SoCs have different assigned responsibilities to operate different devices and perform different processes to balance workload. In one example, the eyewear device utilizes a first SoC to operate the OS, a first color camera, a second color camera, a first display, and a second display. A second SoC is configured to run computer vision (CV) algorithms, visual odometry (VIO), tracking hand gestures of the user, and providing depth from stereo. This configuration provides organized logistics to efficiently operate various features, and balanced power consumption.

Dual system on a chip eyewear

An electronic eyewear device includes first and second systems on a chip (SoCs) having independent time bases and an inter-SoC interface that connects the first and second SoCs. The operations of the first and second SoCs are synchronized by aligning the time bases for the SoCs using a modified PTP technique. The technique includes the second SoC receiving a time synchronization message from the first SoC over the inter-SoC interface, recording a local timestamp of receipt of the time synchronization message, receiving a master timestamp corresponding to a timestamp recorded by the first SoC corresponding to the time of sending the time synchronization message by the first SoC, and calculating a time offset between the local timestamp and the master timestamp. The time bases of the first SoC and second SoC are then aligned using the calculated time offset. To account for transmission delays, multiple time offsets may be averaged.

Synchronizing systems on a chip using time synchronization messages

An electronic eyewear device includes first and second systems-on-chip (SoCs) having independent time bases. The first and second SoCs are connected by a shared general purpose input/output (GPIO) connection and an inter-SoC interface. The first and second SoCs are synchronized to each other by the first SoC asserting the shared GPIO connection to the second SoC where assertion of the message to the shared GPIO connection triggers an interrupt request (IRQ) at the second SoC. The first SoC records a first timestamp for assertion of the message to the GPIO connection, and the second SoC records a second timestamp of receipt of the IRQ. The first SoC sends a message including the first timestamp to the second SoC over the inter-SoC interface. The second SoC calculates a clock offset between the first and second SoCs as a difference between the first and second timestamps.

Synchronizing systems-on-chip using GPIO timestamps

A system to perform stereo stitching of image frames comprises a stereo camera system and a hardware encoder. The hardware encoder receives a left image stream and a right image stream from the stereo camera system simultaneously and processes the left and right image stream to generate a single stitched encoded frame. The apparatus can also comprise a processor and a memory having instructions stored thereon, when executed by the processor, causes the processor to perform operations comprising receiving the left image stream and the right image stream, processing the left and right image streams and generating a single stitched encoded frame.

Hardware encoder for stereo stitching

An eyewear device having an image processor operable in a camera pipeline for computer vision (CV) and in augmented reality (AR) systems. The image processor is configured to selectively control a plurality of cameras to provide images having a first resolution in the high power AR mode, and to provide the images having a second resolution in the low power CV mode. The first resolution is higher than the second resolution, and the plurality of cameras consume less power in the CV mode than the AR mode. The image processor controls the camera pipeline to process the first resolution high IQ images from the plurality of cameras to operate in the AR mode, and controls the camera pipeline to process the second resolution lower IQ images from the plurality of cameras to operate in the CV mode. Substantial power is saved by reducing the resolution of the images using downscaling in the cameras themselves in the CV mode.

Ultra low power camera pipeline for CV in AR systems

An electronic eyewear device includes first and second systems on a chip (SoCs) having independent time bases that are synchronized by generating a common clock signal from a clock generator of the first SoC and simultaneously applying the common clock signal to a first counter of the first SoC and a second counter of the second SoC whereby the first counter and the second counter count clock edges of the common clock. The clock counts are shared through an interface between the first SoC and the second SoC and compared to each other. When the clock counts are different, a clock count of the first counter or the second counter is adjusted to cause the clock counts to match each other. The adjusted clock count is synchronized to the respective clocks of the first and second SoCs, thus synchronizing the first and second SoCs to each other.

Synchronizing systems on a chip using a shared clock

Systems and methods herein describe transmitting metadata to an augmented reality device using inaudible frequencies by receiving a first stream of inaudible sound waves in real-time, generating a first binary representation of the first stream of inaudible sound waves, generating a first set of metadata based on the first binary representation, generating a first plurality of augmented reality content items based on the first set of metadata, causing display of the first plurality of augmented reality content items on a display device coupled to the head-wearable apparatus as the first stream of inaudible sound waves is being received.

Transmitting metadata via inaudible frequencies

Eyewear having an image signal processor (ISP) dynamically operable in a camera pipeline for augmented reality (AR) and computer vision (CV) systems. Multi-purpose cameras are used for simultaneous image capture and CV on wearable AR devices. The cameras are coupled to a frame and configured to generate images, wherein the cameras and the ISP are configured to operate in a first AR mode and capture images having a first resolution suitable for use in AR, and are configured to operate in a second CV mode to provide the images having a second resolution suitable for use in CV. The first resolution in the AR mode is higher than the second resolution in the CV mode, and the cameras and the ISP consume less power in the second CV mode than the first AR mode. The cameras and the ISP save significant system power by operating in the low power mode CV mode.

Multi-purpose cameras for simultaneous capture and CV on wearable AR devices

Eyewear devices that include two SoCs that share processing workload. Instead of using a single SoC located either on the left or right side of the eyewear devices, the two SoCs have different assigned responsibilities to operate different devices and perform different processes to balance workload. In one example, the eyewear device utilizes a first SoC to operate a first color camera, a second color camera, a first display, and a second display. The first SoC and a second SoC are configured to selectively operate a first and second computer vision (CV) camera algorithms. The first SoC is configured to perform visual odometry (VIO), track hand gestures of the user, and provide depth from stereo images. This configuration provides organized logistics to efficiently operate various features, and balanced power consumption.

Systems and methods herein describe pausing operation of an augmented reality device based on user facial movement by monitoring user eye movement of a user of a head-wearable apparatus, determining that the user eye movement is directionally facing away from a display device coupled to the head-wearable apparatus, based on the determination, pausing operation of one or more sensors of the head-wearable apparatus.

Pausing device operation based on facial movement

Imaging methods and imagers for image capture devices. Still images are captured by gathering ambient light data using an ambient light sensor of the image capture device, selecting a frame rate for the imager corresponding to the gathered ambient light data, determining optimal image capture parameters for the imager by executing an auto exposure algorithm with a processor using the selected frame rate as an initialization parameter for the auto exposure algorithm, and capturing a still image with the imager after execution of the auto exposure algorithm using the selected frame rate.

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Marina Del Rey, CA, United States of America

Dmitry Ryuma