Intel Corporation

Avago Technologies International Sales Pte. Limited

Dmitrii A Loukianov

Raju Hormis

Steven J Tu

Joseph G Warner

Solomon B Trainin

Adrian Paul Stephens

Bernard Arambepola

Guoqing C Li

Sang-Hee Lee

Joseph A Bennett

Shaul Shulman

Jan Roelof Westra

Adrian R Pearson

George R Hayek

Naor Goldman

Steve J Brown

Barak Hermesh

Gideon Prat

Jingguang Wang

Kambiz Vakilian

Ziv Kfir

Jeffrey D Hoffman

Pat Brouillette

Raymond Ng

Christopher Andrew Thornburg

Vikrant Dhamdhere

Christopher L Chappell

Vallabhajosyula Zulu Somayazulu

Jabe A Sandberg

Bijan Hakimi

Christopher Ruesga

An Ethernet bridge architecture enables timing replication. The Ethernet bridge receives data packets from a sensor (such as a video sensor) and immediately tags each data packet with a transmitter timecode. The tagged data packets are then forwarded to the appropriate receiver over the digital data network or link that may exhibit packet delivery time variations and reordering. The receiver identifies data packets including the local timecode and delays processing (display) of the data packet until a timecode local to the receiving node matches the transmitter timecode plus some delay. The receiver also restores the original order of the packets by observing packet sequence number and placing them at appropriate location in memory buffer. By delaying processing, the Ethernet bridge compensates for any variance in network latency. The delay should be greater than a worst-case delay as defined by the network architecture. The Ethernet bridge allows a distributed multi-camera and multi-display system based on high-bandwidth Ethernet infrastructure, while still using non-Ethernet sensors, displays, and application processors.

Time-sensitive multimedia endpoint interface bridging through ethernet transport

Systems and methods transfer video data to an image processing system from a video source. Pixel data is received in a local buffer of a network interface controller and provided in a video transport packet. The video transport packet includes the pixel data, a media access control header and a video header. The video transport packet is received by another network interface controller that provides the pixel data directly into a video frame buffer of the image processing system.

Systems and methods for controlling high speed video

In some aspects, the disclosure is directed to methods and systems for providing voltage regulation and transient suppression from a battery to an integrated circuit. A resistor between a source power supply and the integrated circuit may dissipate power and reduce the voltage at the integrated circuit's input, with current through the resistor under control of an internal regulator of the integrated circuit.

Method and apparatus for integrated battery supply regulation and transient suppression

An approach is provided for determining a program clock reference (PCR) value validity, for avoiding inaccurate variable delay reference (VDR) values, and for avoiding a mismatch in a data packet between a sequence number and a packet number for a wireless display extension. The approach involves determining to generate a data packet carrier having an optional PCR value, a VDR) value, and a validity indicator. The approach may further involve processing the data packet carrier to determine whether the data packet carrier has the optional PCR value. The approach may also involve causing, at least in part, a surrogate PCR value to be generated based, at least in part, on a determined absence of the optional PCR value from the data packet carrier.

Method and apparatus for low jitter clock recovery in wireless display extensions

Efficient architecture for a secure access enforcement proxy is described. The proxy interfaces with multiple subsystems and multiple shared resources. The proxy identifies an original transaction command being sent from one of the subsystems to one of the shared resources, identifies a policy corresponding to the subsystem, performs an action pertaining to the original transaction command based on the policy, and sends a response to the subsystem based on the action.

Secure access enforcement proxy

Some demonstrative embodiments include devices, systems and methods of transferring information between elements of a communication device. For example, a device may include a front-end to receive an analog downstream input including a plurality of downstream data channels, and to provide a digital serial downstream output including at least one continuous stream of constant-size downstream frames including a plurality of constant-size downstream data frames, which include downstream sample data of the plurality of downstream data channels; a serial interface including at least one serial lane to transfer the at least on stream of the digital serial downstream output; and a processor to receive the digital serial downstream over the serial interface, and to process the downstream data frames.

Method, apparatus and system of transferring data between elements of a cable communication device

Techniques are described to provide a device and network of devices that collect distributed coordinated timestamps from distributed time counters in a multi-module or multi-integrated circuit system. The interconnect between the modules can be a single-wire or a two-wire interconnect. The modules communicatively coupled to the interconnect can use a collision-avoidance protocol for triggering the broadcasting of timestamps among the modules as well for allowing all modules to transmit their timestamps. Timestamps from multiple clocks can be transmitted by all modules and then collected and compared to produce correction factors to clock signals of each module to potentially achieve distributed clock synchronization in multiple independent modules or integrated circuits.

System, method, and device to distribute accurate synchronization timestamps in an expandable and timing critical system

A device including a two-dimensional convolution unit to perform spatial image filtering. A reference frame mirroring unit is connected to the two-dimensional convolution unit. A mean square error (MSE) decision unit is connected to the two-dimensional convolution unit to perform motion estimation by selecting the displacement that minimizes MSE.

Motion estimation for video processing using 2-D (spatial) convolution

According to some embodiments, encoded information associated with an image is received at a decoder. The encoded information may be decoded at the decoder to generate full-sized first image pixels representing a full-sized version of the image. Moreover, the full-sized pixels may be scaled at the decoder to generate scaled image pixels representing a scaled version of the image.

Digital image decoder with integrated concurrent image prescaler

One embodiment includes a method that includes receiving a compressed video stream. The method also includes decoding a number of blocks of the compressed video stream to output a number of blocks of decoded video data. The decoding is based on at least one motion compensation vector. The method also includes deinterlacing the number of blocks of the decoded video data to output deinterlaced video data. The deinterlacing of one of the blocks of the number of blocks is based on the at least one motion compensation vector if a prediction error energy for the at least one motion compensation vector for the block is less than a threshold.

Shared logic for decoding and deinterlacing of compressed video

Locations of reference blocks of pixels of decoded interlaced video reference fields decoded from a compressed stream of video data are computed using motion vectors decoded from the same stream of video data. The reference block computed locations are de-interlaced with current blocks from current video fields decoded from the compressed streams of video data by low pass filtering light intensities of adjacent pixels of the reference and current blocks using low pass filter with coefficients adjustable according to discrete cosine transform (DCT) high frequency coefficients decoded from the coded stream. In addition, moving edges or objects of the de-interlaced blocks of pixels can be identified by comparing the decoded motion vector of the reference blocks to a threshold value. Then proper or more appealing light intensities for the moving edge pixels can be interpolated.

De-interlacing using decoder parameters

A system and method of end-to-end clock recovery for media streaming. The method including inspecting a data packet sent by an application to determine a protocol type of the data packet and a location of a timestamp field in the data packet. If the data packet matches a pre-determined protocol type, a new timestamp is generated and inserted into the timestamp field of the packet in real-time in place of an original, possibly less reliable timestamp. The new timestamp accurately defines the time of transmission of the data packet. The data packet is transmitted over a network to a receiver. A receiver receiving the data packet, inspects the received data packet to determine whether the received data packet matches an identification criterion. If the received data packet matches the identification criterion, the receiver generates a local timestamp in real-time and processes the local timestamp and the new timestamp from the received packet to determine an error signal. The error signal is used to adjust the local clock within the receiver.

Growing community of inventors

Chandler, AZ, United States of America

Dmitrii A Loukianov