Advanced Micro Devices Corporation

Divya Madapusi Srinivas Prasad

Yasuko Eckert

Vilas K Sridharan

Amitabh Mehra

Sudhanva Gurumurthi

Sankaranarayanan Gurumurthy

Vikram Ramachandra

Shidhartha Das

Alex W Schaefer

Jeffrey Richard Rearick

Michael Ignatowski

An exemplary computing device includes a plurality of circuits and/or a plurality of in-situ monitors configured to generate outputs that indicate one or more operating conditions of the circuits. The computing device also includes a system management unit configured to detect a potentially faulty voltage-to-frequency ratio implemented by one of the circuits based at least in part on one or more of the outputs. The system management unit is also configured to modify the potentially faulty voltage-to-frequency ratio based at least in part on one or more of the outputs. Various other devices, systems, and methods are also disclosed.

Devices, systems, and methods for detecting and mitigating silent data corruptions via adaptive voltage-frequency scaling

A memory device includes a memory circuitry includes a first transmission grate, a first capacitor, a second transmission gate, and a second capacitor. The first transmission gate includes a first transistor connected between a first node and a second node. The first transistor having a gate terminal connected to a first clock node. The first clock node configured to receive a first clock signal. The first capacitor is connected between the second node and a first voltage node. The first capacitor is a ferroelectric capacitor. The second transmission gate includes a second transistor connected between the second node and a third node. The second transistor has a gate terminal connected to the first clock node. The second capacitor is connected between the third node and a second voltage node.

Register, flop, and latch designs inlcuding ferroelectric and linear dielectrics

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Santa Clara, CA, United States of America

Divya Madapusi Srinivas Prasad