Infineon Technologies Austria Ag

Eupec Europaeische Gesellschaft Fuer Leistungshalbleiter Mbh & Co. Kg

Dirk Priefert

Remigiusz Viktor Boguszewicz

Ralf Rudolf

Matteo Albertini

Uwe Wahl

Wolfgang Frank

Christian Schippel

Rolf Buckhorst

Frank Michalzik

Felix Simon Winterer

Viktor Boguszewicz

A semiconductor device includes a substrate layer having a floating base region of a first conductivity type. A first well of a second conductivity type and the floating base region form a first pn junction. A first conductive structure is electrically connected to the first well. A barrier region of the second conductivity type and the floating base region form an auxiliary pn junction. A second conductive structure is electrically connected to the floating base region through a rectifying structure. A pull-down structure is configured to produce a voltage drop between the barrier region and the second conductive structure, when charge carriers cross the auxiliary pn junction.

Semiconductor device including substrate layer with floating base region and gate driver circuit

A gate driver device includes a first field effect transistor and a first driver circuit. The first field effect transistor includes a first gate electrode and a first backgate structure. The first driver circuit supplies a first backgate drive signal to the first backgate structure.

Gate driver device having a driver circuit for supplying a backgate drive signal

Gate driver device

A power supply circuit can be used to provide an alternating-current supply voltage to an electric motor. The power supply circuit is supplied by line power. The power supply circuit includes a inverter including at least one pair of transistor for generating a corresponding phase of the plurality of power supply phases. The inverter includes a transistor control circuit for switching the low-side transistor to its conducting state and the high-side transistor to its non-conducting state in case an excess voltage is detected at the input of the inverter.

Safety circuit and emergency power supply for gate control circuit

An SOI semiconductor component comprises a semiconductor substrate having a basic doping, a dielectric layer arranged on the semiconductor substrate, and a semiconductor layer arranged on the dielectric layer. The semiconductor layer includes a drift zone of a first conduction type, a junction between the drift zone and a further component zone which is configured in such a way that a space charge zone is formed in the drift zone when a reverse voltage is applied to the junction, and a terminal zone adjacent to the drift zone. A first terminal electrode is connected to the further component zone, and a second terminal electrode is connected to the terminal zone. In the semiconductor substrate a first semiconductor zone is doped complementarily with respect to a basic doping of the semiconductor substrate, and the first terminal electrode is connected to the first semiconductor zone. A rectifier element is connected between the first terminal electrode and the first semiconductor zone.

Lateral SOI component having a reduced on resistance

A lateral semiconductor element ( ) in thin-film SOI technology comprises an insulator layer ( ) which rests on a substrate ( ) and is buried under a thin silicon film ( ), on top of which the source, or anode, contact ( ) and the drain, or cathode, contact ( ) are mounted. The anode contact ( ) and the cathode contact ( ) each lie over separate shield regions ( ) within substrate ( ), with the anode contact ( ) being electrically connected with substrate ( ).

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Moers, Germany

Dirk Priefert