International Business Machines Corporation

Globalfoundries Inc.

Samsung Electronics Co., Ltd.

Shin-etsu Chemical Co., Ltd.

Dirk Pfeiffer

Katherina E Babich

Peilin Song

Christos Dimitrios Dimitrakopoulos

David Robert Medeiros

Ratnam Sooriyakumaran

Elbert Emin Huang

Sean David Burns

Matthew Earl Colburn

Qinghuang Lin

Marie Angelopoulos

Alfred Grill

Joshua T Smith

Robert L Wisnieff

Jean-Olivier Plouchart

Chung H Lam

Stephen McConnell Gates

Franco Stellari

Scott David Halle

Devendra K Sadana

Takashi Ando

Wu-Song S Huang

Phillip Joe Brock

James Bowler Hannon

Vijay Narayanan

Arvind Kumar

Robert David Allen

Alan Edward Rosenbluth

Ramachandran Muralidhar

Eduard Albert Cartier

Thomas M Shaw

Satyanarayana Venkata Nitta

Deborah A Neumayer

Dario Leonardo Goldfarb

Kafai Lai

Jeffrey Curtis Hedrick

Kangguo Cheng

Carl John Radens

Ghavam G Shahidi

Steven J Holmes

Ramachandra Divakaruni

Theodore Gerard Van Kessel

Timothy Joseph Dalton

Kenneth Parker Rodbell

Jack Oon Chu

Daniel Joseph Friedman

Yves Corfield Martin

Damon B Farmer

Griselda Bonilla

Frank Robert Libsch

Benjamin H Wunsch

John Albrecht Ott

Muthumanickam Sankarapandian

Richard Harold Boivie

Gregory Michael Wallraff

Gregory Breyta

Seiji Munetoh

Kaushik Arun Kumar

Stephen W Bedell

Daniel C Edelstein

Keith E Fogel

Shu-Jen Han

Jeehwan Kim

Sampath Purushothaman

Tsutomu Ogihara

Katherine Lynn Saenger

Franco Motika

Richard Stephan Wise

Alberto Valdes Garcia

Wilfried Haensch

Wayne Martin Moreau

Sami Rosenblatt

Daniel Sanders

Motoaki Iwabuchi

Keith Aelwyn Jenkins

Richard Anthony Conti

Matthew Joseph BrightSky

Takafumi Ueda

Ali Khakifirooz

Effendi Leobandung

David V Horak

Bahman Hekmatshoartabari

Sandeep R Patil

Toshiharu Furukawa

Gandhi Sivakumar

Matthew B Trevathan

Hemanth Jagannathan

Davood Shahrjerdi

Cyril Cabral, Jr

Sri Ramanathan

Kerry Bernstein

Martin Michael Frank

Wesley Charles Natzle

Robert L Bruce

Harold John Hovel

Edward William Kiewra

Timothy A Brunner

James A Culp

Mahmoud M Khojasteh

Linda Karin Sundberg

An obfuscation circuit relies on a tamper-resistant nonvolatile memory which encodes a trusted Boolean function. The Boolean function is used to enable several operations relating to circuit obfuscation, including obfuscation of logic circuitry, obfuscation of operand data, and release of IP blocks. The tamper-resistant nonvolatile memory is part of a trusted integrated circuit structure, i.e., one fabricated by a trusted foundry, separate from another integrated circuit structure which contains the various operational logic circuits of the design and is fabricated by an untrusted foundry. The Boolean function is encoded based on a look-up table implemented as a cascaded multiplexer circuit. Multiple obfuscation functions can be so encoded. The obfuscation functions may be reprogrammed using a protocol that relies on symmetric keys, one of which is stored in the tamper-resistant nonvolatile memory.

Tamper resistant obfuscation circuit

A microfluidic device that reads a colloidal mixture and separates the colloids based upon size and shape. and in the case of polymer colloids such as DNA, it reads patterns of markers attached to DNA. The combination of different separated fractions and DNA markers (it mapping) constitutes the physical code.

Use of microfluidic reader device for product authentication

A tamper-resistant memory is formed by placing a solid-state memory array between metal wiring layers in the upper portion of an integrated circuit (back-end of the line). The metal layers form a mesh that surrounds the memory array to protect it from picosecond imaging circuit analysis, side channel attacks, and delayering with electrical measurement. Interconnections between a memory cell and its measurement circuit are designed to protect each layer below, i.e., an interconnecting metal portion in a particular metal layer is no smaller than the interconnecting metal portion in the next lower layer. The measurement circuits are shrouded by the metal mesh. The substrate, metal layers and memory array are part of a single monolithic structure. In an embodiment adapted for a chip identification protocol, the memory array contains a physical unclonable function identifier that uniquely identifies the tamper-resistant integrated circuit, a symmetric encryption key and a release key.

Tamper-resistant circuit, back-end of the line memory and physical unclonable function for supply chain protection

Methods and systems for locating a filament in a resistive memory device are described. In an example, a device can acquire an image indicating an occurrence of photoemission from the resistive memory device. The device can determine a location of the filament in a switching medium of the resistive memory device using the acquired image.

RRAM filament location based on NIR emission

A technique relates to biasing, using a control system, a crossbar array of resistive processing units (RPUs) under a midrange condition, the midrange condition causing resistances of the RPUs to result in a random output of low values and high values in about equal proportions. The control system reinforces the low values and the high values of the random output by setting the resistances of the RPUs to a state that forces the low values and the high values having resulted from the midrange condition. Reinforcing the low values and the high values makes the random output permanent even when the crossbar array of the RPUs is not biased under the midrange condition. The control system records a sequence of the low values and the high values of the random output responsive to reinforcing the low values and the high values of the random output.

Secure chip identification using resistive processing unit as a physically unclonable function

An approach to creating a tamper-resistant field programmable gate array (FPGA) and remotely reprogramming the tamper-resistant FPGA. In one aspect, determining if an encryption key is stored in a physical unclonable function (PUF) of the FPGA. Further, responsive to the encryption key not being stored in a PUF, writing an encryption key in tamper resistant memory associated with a back end of the line (BEOL) of the FPGA. In another aspect, writing a program key and a look-up table (LUT) in the tamper resistant memory.

Trusted field programmable gate array

A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.

Encryption engine with an undetectable/tamper-proof private key in late node CMOS technology

A method of preparing a complex microscopic colloidal mixture formulation and a method of authenticating a product containing a code attached thereto which code is a mixture of different hard bodied colloidal particles and polymeric particles having different properties, which are present in set ratios. The code is extracted from the product and is checked with data that was originally applied to the product to determine its authenticity.

Method for product authentication using a microfluidic reader

A composition system which is a mixture of colloids forming a physical code is implanted into a product and later extracted and read to authenticate the product thus providing secure means to check the authenticity of the product against counterfeiting.

Zonal nanofluidic anti-tamper device for product authentication

Encryption engine with an undetectable/tamper proof private key in late node CMOS technology

Methods and systems for generating an identifier includes testing an operational characteristic for each device in an array of pairs of devices. Each pair of devices includes a first device and a second device. The first device of each pair has a higher inter-device uniformity for the operational characteristic than the second device of the pair. The operational characteristic between the first device and the second device is compared for each pair of devices to generate a respective identifier bit for each pair of devices. An identifier is generated from the identifier bits.

Lithographically defined intrinsic identifier

Methods and systems for generating an identifier include detecting emissions from a phosphor pattern with a sensor grid comprising one or more sensors when the phosphor pattern is stimulated with radiation. An output signal of each sensor in the sensor grid is compared to a threshold value to generate respective identifier bits. An identifier is generated from the identifier bits.

Screen printed phosphors for intrinsic chip identifiers

A system for labeling an object uses at least one object label made from a material that absorbs and reflects incident energy uniformly across all wavelengths of incident energy at a ratio proportional to a thickness of the material and that includes a pattern having variations in the thickness of the material along at least one of two orthogonal directions across the label. An interrogator directs a predetermined wavelength of radiation to the at least one label, and a reader to receives reflected radiation from the label at the predetermined wavelength and interprets the reflected radiation to recognize the pattern.

Graphene-based micro-scale identification system

Growing community of inventors

Dobbs Ferry, NY, United States of America

Dirk Pfeiffer