Advanced Micro Devices Corporation

Dirk J Wristers

H Jim Fulford

Dim-Lee Kwong

Dim Lee Kwong

A silicon oxynitride (oxynitride) dielectric layer is presented using a process in which nitrogen is incorporated into the dielectric as it is grown upon a silicon substrate. The oxynitride layer is grown at elevated temperature and pressure in an ambient containing N.sub.2 O and/or NO. A MOS gate dielectric is advantageously formed from the oxynitride dielectric layer with a sufficient nitrogen concentration near the interface between a boron-doped polysilicon gate electrode and the gate dielectric as to prevent boron atoms from penetrating into the gate dielectric. Further, the oxynitride layer contains a sufficient nitrogen concentration near the interface between the gate dielectric and a silicon substrate as to reduce the number of high-energy electrons injected into the gate dielectric which become trapped in the gate dielectric. Nitrogen atoms in the gate dielectric near the interface between the boron-doped polysilicon gate electrode and the gate dielectric physically block boron atoms, preventing them from penetrating into the gate dielectric. Nitrogen atoms and silicon atoms form strong Si--N bonds at the interface between the gate dielectric and the silicon substrate, helping ensure injected electrons are not easily trapped in the oxynitride dielectric layer.

Method of forming high pressure silicon oxynitride gate dielectrics

High quality oxides utilized in tunnel oxides and CMOS gate oxides are formed using a process that includes annealing a semiconductor substrate, after the oxide has been formed, in an ambient comprised of NO to form a surface layer in the oxide containing a concentration of nitrogen. A high-quality tunnel oxide, suitable for EEPROM devices, is formed upon a surface region of a semiconductor body over a heavily-doped N+ layer by first oxidizing the semiconductor body to form an oxide upon the surface region of the semiconductor body over the heavily-doped N+ layer. Next, the semiconductor body is annealed, under a gettering ambient, to densify the oxide and to dope the oxide at its surface and for a portion thereinto near its surface with a gettering agent. The semiconductor body is then oxidized, under an oxidizing ambient, to thicken the oxide. The annealing step in NO improves characteristics for both the gate and tunnel oxides of the device at a temperature substantially reduced from prior art methods and in an ambient atmosphere containing significantly more NO. The NO anneal can be performed in a variety of ways including an RTP anneal, a furnace anneal and can be performed on processes where the oxides are formed using CVD and PECVD.

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Austin, TX, United States of America

Dirk J Wristers