Intel Corporation

Intel Mobile Communications Gmbh

Infineon Technologies Ag

Dirk Friedrich

Timo Gossmann

Andreas Holm

Andreas Menkhoff

Georgios Yorgos Palaskas

Paolo Madoglio

Thomas Bauernfeind

Nick Shute

Peter Laaser

Josef Holzleitner

Andrei Panioukov

Michael Rozmann

A method for determining a signal propagation time mismatch in a modulator comprises generating a predetermined signal shape of a amplitude component of a radio frequency signal generating one or more predetermined conditions in a frequency component of the radio frequency signal at a first time interval relative to the predetermined signal shape and detecting the one or more predetermined conditions in the frequency component at a second time interval. The method further includes determining the amplitude component at the second time interval and calculating a signal propagation time mismatch value based on the signal shape of the amplitude component, on the first time interval and the second time interval.

Method and circuits for determining signal propagation time mismatches in a modulator

Modulation circuitry is configured to generate a phase modulated signal having an output frequency that corresponds to a local oscillator (LO) signal divided by N.5. A phase locked loop (PLL) is configured to generate an LO signal having a frequency that is N.5 times the output frequency. Pulse circuitry configured to generate, based at least on a value of N, an edge signal including a pulse aligned with a positive edge of the LO signal and a pulse aligned with a negative edge of the LO signal. The edge signal is used to generate the phase modulated signal.

Modulation circuitry with N.5 division

Examples provide an adaptation circuit and apparatus, method and computer programs for adapting, fabricating and operating, a radio transceiver, a mobile transceiver, a base station transceiver and storage for computer programs or instructions. The adaptation circuit () is configured to adapt a local oscillator signal in a radio transceiver (). The radio transceiver () comprises a transmission branch () and a reception branch (), which are subject to cross-talk. The reception branch () comprises a local oscillator () configured to generate the local oscillator signal. The adaptation circuit () comprises a control module () configured to determine crosstalk level information between the transmission branch () and the reception branch (), and to adapt the local oscillator signal based on the crosstalk level information.

Adaptation circuit for a transceiver

A transmitter for generating an analog radio frequency transmit signal is provided. The transmitter includes a digital-to-analog converter configured to receive an oscillation signal and a first digital data signal to generate an analog radio frequency transmit signal. Further, the transmitter includes an oscillation signal generator configured to generate the oscillation signal with an oscillation frequency based on a second digital data signal. The transmitter additionally includes a controller configured to change a first sample frequency of the first digital data signal from a first frequency to a value different than the oscillation frequency, wherein the first frequency is at least the oscillation frequency.

Transmitter and a method for generating an analog radio frequency transmit signal

One embodiment relates to a feedback receiver (FBR). The FBR includes a FBR signal input configured to receive a radio frequency (RF) signal, a first local oscillator (LO) signal input configured to receive a first LO signal having an LO frequency, and a second LO signal input configured to receive a second LO signal having the LO frequency. The second LO signal is phase shifted by approximately 90&#xb0; relative to the first LO signal. FBR also includes a divider that induces a time-varying phase shift in the first and second LO signals while concurrently retaining a 90&#xb0; phase shift between the first and second LO signals.

FBR DC vector offset removal using LO phase switching

A signal processing circuit for providing a modulated analog transmit signal on the basis of a digital transmit data signal is disclosed. The signal processing circuit includes one or more digital circuit components and one or more analog circuit components, and is configured to vary a bias voltage or a supply voltage of at least one of the one or more digital circuit components or at least one of the one or more analog circuit components in dependence on a detected or predefined parameter when providing the modulated analog transmit signal. The detected or predefined parameter includes a parametric or environmental condition associated with the signal processing circuit.

Signal processing circuit and method

A signal processing circuit for providing a modulated analog transmit signal on the basis of a digital transmit data signal is configured to vary a resolution in dependence on a detected or predefined parameter when providing the modulated analog transmit signal.

The data and clock regeneration circuit can be completely integrated in a chip. The circuit has, in series, two independent PLL regulating stages which are optimally adjustable separately. The first PLL regulating stage has a large bandwidth and is optimized for maximum jitter tolerance and the second PLL regulating stage has a small bandwidth and is optimized for minimum jitter transfer. The circuit is suitable for use, for example, in transceivers for ATM, SONET, and SDH applications with signal transmission links in the Gbit range.

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Munich, Germany

Dirk Friedrich