Infineon Technologies Ag

Dirk Drescher

Stephan Wege

Helmut Wurzer

Ralf Zedlitz

Joerg Dreybrodt

Helmut Horst Tews

Martin Schrems

Wolfram Karcher

Schrems Martin

A semiconductor element with at least one layer of tungsten oxide, optionally in a structured tungsten oxide layer, is described. The semiconductor element is characterized in that the relative premittivity of the tungsten oxide layer is higher than 50.

Process for fabrication of a semiconductor component having a tungsten oxide layer

A trench capacitor for use in a semiconductor memory cell is formed in a substrate and includes a trench having an upper region and a lower region. An insulation collar is formed in the upper region of the trench. The lower region of the trench extends through a buried well. A dielectric layer, which is formed from tungsten oxide, serves as a capacitor dielectric. A conductive trench filling, which is filled into the trench, is formed from silicon or a tungsten-containing material such as tungsten, tungsten silicide or tungsten nitride.

Trench capacitor and method for fabricating the same

Doped polysilicon layers and layered polysilicon structures are produced, and the layers and layered structures are structured. The doping is distinguished by the fact that the doping compound is added as a process gas during the chemical vapor deposition of the polysilicon to define the doping profile. The feed of dopant to the process gas is stopped toward the end of the vapor deposition, with the result that a boundary layer of undoped silicon is deposited. As a result, a favorable surface quality and better adhesion to a neighboring layer is obtained. The structuring process comprises an at least three-step etching process in which a fluorine containing gas is used for etching in a first step, a chlorine-containing gas is used for etching in a second step and a bromine-containing gas is used for etching in a third step. The invention also encompasses wafers and semiconductor chips produced with the novel doping and/or structuring method.

CVD method of producing in situ-doped polysilicon layers and polysilicon layered structures

Doped polysilicon layers and layered polysilicon structures are produced, and the layers and layered structures are structured. The doping is distinguished by the fact that the doping compound is added as a process gas during the chemical vapor deposition of the polysilicon to define the doping profile. The feed of dopant to the process gas is stopped toward the end of the vapor deposition, with the result that a boundary layer of undoped silicon is deposited. As a result, a favorable surface quality and better adhesion to a neighboring layer is obtained. The structuring process comprises an at least three-step etching process in which a fluorine containing gas is used for etching in a first step, a chlorine-containing gas is used for etching in a second step and a bromine-containing, gas is used for etching in a third step. The invention also encompasses wafers and semiconductor chips produced with the novel doping and/or structuring method.

Method of structuring layers with a polysilicon layer and an overlying metal or metal silicide layer using a three step etching process with fluorine, chlorine, bromine containing gases

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Langebrück, Germany

Dirk Drescher