Wisconsin Alumni Research Foundation

Dionisios N Pnevmatikatos

Gurindar Singh Sohi

Todd M Austin

The data cache features an improved mechanism for accessing data from the data memory array of a data cache, by generating a predicted address and using it to access the data cache array in parallel with the effective address computation. The logic circuitry consists of elements which are capable of performing a carry-free addition (logical or arithmetic) of a predetermined number of base register address bits with the same number of offset register address bits. Methods to generate and verify the predicted index are also provided.

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Dionisios N Pnevmatikatos