Apple Inc.

Dingkun Du

Jay B Fletcher

Jitendra K Agrawal

Michael B Nussbaum

Floyd L Dankert

Chongli Cai

A power converter circuit included in a computer system may include multiple devices and a switch node coupled to a regulated power supply node via an inductor. During a first time period, the power converter charges a capacitor, and the couples the capacitor to the switch node during a second time period. During a third time period the power converter couples the switch node to an input power supply node. To maintain constant charge delivered to the load during each time the switch node is coupled to the input power supply node, the duration of the third time period is adjusted based on a voltage level of the input power supply node, a voltage level of the regulated power supply node, a value of the inductor, and the durations of first and second time periods.

Adaptive on-time generation for three-level power converters

A voltage regulator circuit included in a computer system may include multiple devices and a switch node coupled to a regulated power supply node via an inductor. The voltage regulator circuit may charge a capacitor using an input power supply signal, and couple the capacitor to the switch node using respective subsets of the multiple devices, which are selected based on one or more control signals. A control circuit may generate the one or more control signals based on a particular switching sequence, which is selected based on a ratio of a voltage level of the regulated power supply node and a voltage level input power supply signal.

Cycle transitions for buck converter circuits

A voltage regulator circuit included in a computer system may include multiple devices and a switch node coupled to a regulated power supply node via an inductor. The voltage regulator circuit may, using different subsets of the multiple devices, charge a capacitor for a first period of time and then couple the switch node to the capacitor for a second period of time. A control circuit may sense, using a common circuit, different characteristics of a current through the inductor during respective operation modes, and adjust the first and second periods of time based on the different characteristics of the current and a current operation mode.

Sense circuit for buck converter circuit

A voltage regulator circuit included in a computer system may include multiple devices and a switch node coupled to a regulated power supply node via an inductor. The voltage regulator circuit may couple the switch node to a capacitor for different periods of time using respective different subsets of the multiple devices. A control circuit may modify active times of control signals coupled to the multiple devices based on voltage samples of the switch node in order to adjust the durations of the different periods of time.

Fly capacitor voltage balancing for buck converter circuit

A voltage regulator circuit is disclosed. In one embodiment, a low drop-out (LDO) voltage regulator includes a voltage loop and a current loop. The current loop includes a source follower coupled to an output node of the LDO voltage regulator, the source follower being implemented with a PMOS transistor. The current loop also includes a current mirror coupled between a first branch of the current loop and a second branch of the current loop. The source follower is implemented in the second branch of the current loop. The voltage loop includes an amplifier circuit having an inverting input coupled to the output node, and a non-inverting input coupled to receive a reference voltage. The output of the amplifier is coupled to the gate terminal of the PMOS transistor of the current mirror.

Dual loop adaptive LDO voltage regulator

A voltage regulator is disclosed. The voltage regulator is cascaded, including first and second stages. The first stage may be a capacitor-less first stage that includes a source follower implemented with a first PMOS transistor, with the first PMOS transistor receiving a first reference voltage on its respective gate terminal. The first stage is coupled to receive a first voltage from an external voltage supply, and to provide a second voltage to the second stage. The second stage may be directly and exclusively coupled to the first stage, with no capacitor or connection for one coupled to the first stage output. The second stage may provide an output voltage, on an output node, with the output voltage being less than the second voltage.

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Santa Clara, CA, United States of America

Dingkun Du