Intel Corporation

Pmc-sierra, Inc.

Level One Communications, Inc.

Legend Silicon Corporation

Dinesh Venkatachalam

Visveswar Akella

Sanjay Sharma

Amalkiran Bommireddy

Lin Yang

Brian D Holden

Brian D Alleyne

Darren S Braun

Raghavan Menon

Chee Hu

Steve T Sprouse

Nadeem Haq

Imran N Chaudhri

Kevin Reno

An LDPC based TDS-OFDM receiver for demodulating an LDPC encoded TDS-OFDM modulated RF signal downconverted to an IF signal includes a synchronization block, an equalization block, an OFDM demodulation block and a FEC decoder block. The synchronization block generates a baseband signal from a digitized IF signal and performs correlation of a PN sequence in a signal frame of the received RF signal with a corresponding locally generated PN sequence to provide signals for performing carrier recovery, timing recovery and parameters for channel estimation. The equalization block performs channel estimation and channel equalization. The OFDM demodulation block performs demodulation on the baseband signal to recover OFDM symbols and converts the OFDM symbols to frequency domain. The FEC decoder block includes an LDPC decoder for decoding the OFDM symbols based on the LDPC code to generate a digital output signal indicative of the data content of the RF signal.

Receiver for an LDPC based TDS-OFDM communication system

A distributed memory switch system for transmitting packets from source ports to destination ports, comprising: a plurality of ports including a source port and a destination port wherein a packet is transmitted from the source port to the destination port; a memory pool; and an interconnection stage coupled between the plurality of ports and the memory pool such that the interconnection stage permits a packet to be transmitted from the source port to the destination port via the memory pool.

Distributed switch memory architecture

Methods and devices useful in high-speed scalable switching systems include a memoryless switch fabric, per virtual channel queuing, digital phase aligners, randomized and complement connection modes, a mid-point negative acknowledge and output negative acknowledge scheme among other elements. A particular implementation of a routing table and switch element is described in part to illustrate the various techniques and devices of the invention.

Apparatus for high speed communication system

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Fremont, CA, United States of America

Dinesh Venkatachalam