Freescale Semiconductor,inc.

Dieu Van Dinh

Peter R Harper

George R Leal

Lois E Yong

Tu Anh Tran

Jeffrey W Metz

A bond pad () has a probe region () and a wire bond region () that are substantially non-overlapping. In one embodiment, the bond pad () is connected to a final metal layer pad () and extends over an interconnect region (). The bond pad () is formed from aluminum and the final metal layer pad () is formed from copper. Separating the probe region () from the wire bond region () prevents the final metal layer pad () from being damaged by probe testing, allowing for more reliable wire bonds. In another embodiment, the probe region () extends over a passivation layer (). In an application requiring very fine pitch between bond pads, the probe regions () and wire bond regions () of a plurality of bond pads formed in a line may be staggered to increase the distance between the probe regions (). In addition, forming the bond pads () over the interconnect region () reduces the size of the integrated circuit.

Semiconductor device having a bond pad and method therefor

A bond pad () has a probe region () and a wire bond region () that are substantially non-overlapping. In one embodiment, the bond pad () is connected to a final metal layer pad () and extends over an interconnect region (). The bond pad () is formed from aluminum and the final metal layer pad () is formed from copper. Separating the probe region () from the wire bond region () prevents the final metal layer pad () from being damaged by probe testing, allowing for more reliable wire bonds. In an application requiring very fine pitch between bond pads, the probe regions () and active regions () of a plurality of bond pads formed in a line may be staggered to increase the distance between the probe regions (). In addition, forming the bond pads () over the interconnect region () reduces the size of the integrated circuit.

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Austin, TX, United States of America

Dieu Van Dinh