Infineon Technologies Ag

Robert Boschgmbh

Dietrich Bonart

Thomas Gross

Bernhard Weidgans

Andreas Peter Meiser

Walter Hartner

Hermann Gruber

Johann Gatterbauer

Ludger Borucki

Dirk Ahlers

Peter Voigt

Martina Debie

Markus Zundel

Gerhard Enders

Adolfo De Cicco

Martina Heigl

Hermann Wendt

Alfred Goerlach

Thomas Fischer

Gudrun Stranzl

Tobias Schmidt

Gernot Unterweger

Rosario Chiodo

Michael Weis

Frank Singer

Andrea Logiudice

Richard Spitz

Carolin Tolksdorf

Stefan Beyer

Bjoern Fischer

Franziska Haering

Salvatore Piccolella

Anja Reitmeier

Anja Gissibl

Goerlach Alfred

Tolksdorf Carolin

Spitz Richard

A semiconductor die includes: a semiconductor substrate; a first contact pad structure above the semiconductor substrate, the first contact pad structure including a metal contact pad configured for electrical contact and a metal layer adjoining an underside of the metal contact pad and jutting out beyond an edge of the metal contact pad; and a first optical detection marker in a periphery of the first contact pad structure and having a different contrast than the metal contact pad. The first optical detection marker includes a region of the metal layer that is adjacent to the edge of the metal contact pad and unobstructed by the metal contact pad so as to be optically visible in a plan view of the semiconductor die. A method of producing the semiconductor die is also described.

Semiconductor die having an optical detection marker and method of producing the semiconductor die

An optical projection device and a method of producing the optical projection device are described. The optical projection device includes: a plurality of LEDs (light-emitting diodes), the LEDs each including a semiconductor mesa laterally spaced apart from one another by a grid structure. Each of the semiconductor mesas includes an n-type material and a p-type material adjoining at least partly the n-type material. The grid structure at least partly laterally surrounds at least the n-type material of each of the semiconductor mesas. The grid structure includes a conductive material that electrically interconnects the n-type material of the semiconductor mesas. The grid structure is configured to block optical crosstalk between light emitted by the LEDs.

Optical projection device having a grid structure

A system may include a set of light-emitting diode (LED) circuits, wherein each LED circuit of the set of LED circuits comprises: a first electrode; a set of second electrodes; and a set of pixels, wherein each pixel of the set of pixels corresponds to a combination of the first electrode and a respective second electrode of the set of second electrodes. A plurality of pixels may include the set of pixels corresponding to each LED circuit of the set of LED circuits. The first electrode may be located within a center portion of the respective LED circuit, and each second electrode of the set of second electrodes may be located within an outer portion the respective LED circuit. The system also includes a controller circuit configured to control whether each pixel of the plurality of pixels is activated or deactivated.

Multi-pixel LED arrangements

A semiconductor chip includes a mounting surface having a plurality of first conductive contacts and a second conductive contact, wherein each of the first contacts in the plurality is arranged in a regularly spaced apart array such that centroids of immediately adjacent ones of the first contacts are separated from one another in a first direction by a first distance, each of the first contacts in the plurality have an identical first lateral extent, and the second conductive contact is arranged between two of the first conductive contacts in the first direction such that first and second distances between the at least one second conductive contact and the two of the first conductive contacts are each less than the first distance.

Semiconductor chip comprising a multiplicity of external contacts, chip arrangement and method for checking an alignment of a position of a semiconductor chip

A vehicle headlamp control circuit is configured to control a vehicle headlamp comprising a plurality of lighting elements. The vehicle headlamp control circuit may comprise a memory that stores information for controlling the plurality of lighting elements, and a driver circuit that drives the plurality of lighting elements based on the information, wherein the information compensates for one or more failed elements of the plurality of lighting elements.

Compensating for failed pixels in pixelated vehicle headlamps

Various embodiments provide a semiconductor chip, wherein the semiconductor chip comprises a first contact area and a second contact area both formed at a frontside of the semiconductor chip; a passivation layer arranged at the frontside between the first contact area and the second contact area; and a contact stack formed over the frontside of the semiconductor chip and comprising a plurality of layers, wherein at least one layer of the plurality of layers is removed from the passivation layer and boundary regions of the contact areas being adjacent to the passivation layer and wherein at least one another layer of the plurality of different layer is present in the boundary region of the contact areas adjoining the passivation layer.

Semiconductor chip and method of processing a semiconductor chip

This disclosure includes systems, methods, and techniques for controlling a plurality of light-emitting diodes (LEDs). For example, a circuit includes a switching device, where the switching device is electrically connected to an LED of the plurality of LEDs, and where the switching device is configured to control whether the LED receives an electrical signal from a power source. Additionally, the circuit includes processing circuitry configured to receive a photocurrent signal indicative of a photocurrent value corresponding to the LED, compare the photocurrent value with a threshold photocurrent value, and control, based on the comparison of the photocurrent value with the threshold photocurrent value, an output current of the LED.

Controlling LED intensity based on a detected photocurrent value

A semiconductor chip includes: a semiconductor substrate having driver circuitry configured to drive an array of electronic devices; a metal layer above the semiconductor substrate, the metal layer having an array of contacts electrically connected to the driver circuitry and configured to provide an electrical connection between the semiconductor chip and the array of electronic devices; and a plurality of structures formed in the metal layer and/or in a layer between the metal layer and the semiconductor substrate, the plurality of structures being visually unobstructed at a side of the metal layer which faces away from the semiconductor substrate. Each structure of the plurality of structures is physically encoded with a pattern that corresponds to a location of an individual pair of contacts within the array of contacts or a location of a group of adjacent pairs of contacts within the array of contacts.

Encoded driver chip for light emitting pixel array

This disclosure includes systems, methods, and techniques for controlling a plurality of light-emitting diodes (LEDs). For example, a circuit includes a switching device, where the switching device is electrically connected to an LED of the plurality of LEDs, and where the switching device is configured to control whether the LED receives an electrical signal from a power source. Additionally, the circuit includes processing circuitry configured to determine that the LED is associated with a bright failure condition by attempting to prevent the LED from receiving the electrical signal from the power source using the switching device and disable the LED in response to detecting the bright failure condition.

Detecting LED failure conditions

A semiconductor wafer includes a semiconductor substrate having a plurality of die areas separated from one another by dicing areas. Each die area includes one or more metal layers above the semiconductor substrate and a plurality of fuse structures formed in at least one of the one or more metal layers. Each fuse structure includes a fuse area between first and second fuse heads. Each die area also includes a first pair of contacts connected to different areas of the first fuse head of at least some of the fuse structures. The wafer can be singulated along the dicing areas into individual dies. A corresponding method of fuse verification is also provided.

Electrically-verifiable fuses and method of fuse verification

A semiconductor chip includes a mounting surface having a plurality of first conductive contacts and at least one second conductive contact. Each of the first contacts is arranged in a regularly spaced apart array such that centroids of immediately adjacent first contacts are separated from one another in a first direction by a first distance. Each of the first contacts have an identical first lateral extent. The second conductive contact is at least partially within an area which has the first lateral extent and is separated from an immediately first contact by the first distance. Either the second conductive contact has a second lateral extent that is less than the first lateral extent; or a centroid of the second conductive contact is separated in the first direction from the centroid of one of the first contacts by a second distance that is different from the first distance.

An alternator assembly includes an input terminal configured to input an alternating voltage, an output terminal configured to output a rectified voltage, and a gated diode arranged in a load path between the input terminal and the output terminal.

Alternator assembly having a gated diode arranged in a load path between an input terminal and an output terminal

A semiconductor device includes an active region disposed in a semiconductor substrate and an uppermost metal level including metal lines, where the uppermost metal level is disposed over the semiconductor substrate. Contact pads are disposed at a major surface of the semiconductor device, where the contact pads are coupled to the metal lines in the uppermost metal level. An isolation region separates the contact pads disposed at the major surface. Adjacent contact pads are electrically isolated from one another by a portion of the isolation region. Reflective structures are disposed between the upper metal level and the contact pads, where each of the reflective structures that is directly over the active region completely overlaps an associated portion of the isolation region separating the contact pad.

Semiconductor devices for integration with light emitting chips and modules thereof

A semiconductor arrangement includes a semiconductor body with a first surface, an inner region and an edge region, the edge region surrounding the inner region, an attachment layer spaced apart from the first surface of the semiconductor body in a first direction, an intermediate layer arranged between the first surface of the semiconductor body and the attachment layer, and at least one first type sealing structure. The sealing structure includes a first barrier, a second barrier, and a third barrier. The first barrier is arranged in the intermediate layer and spaced apart from the attachment layer in the first direction. The second barrier is arranged in the intermediate layer, is spaced apart from the first surface in the first direction, and is spaced apart from the first barrier in a second direction. The third barrier extends from the first barrier to the second barrier in the second direction.

Semiconductor arrangement with a sealing structure

An embodiment of the present invention describes a method for forming a doped region at a first major surface of a semiconductor substrate where the first doped region being part of a first semiconductor device. The method includes forming an opening from the first major surface into the semiconductor substrate and attaching a semiconductor die to the semiconductor substrate at the opening. The semiconductor die includes a second semiconductor device, which is a different type of semiconductor device than the first semiconductor device. The method further includes forming a chip isolation region on sidewalls of the opening and surrounding the second semiconductor device, and singulating the semiconductor substrate.

Growing community of inventors

Bad Abbach, Germany

Dietrich Bonart