Infineon Technologies Ag

Dietmar König

Frank Hellwig

Andreas Kolof

Jens Barrenscheen

Albrecht Mayer

Gunther Fenzl

Harry Siebert

Michael Augustin

Wei Wang

Josef Niederl

Klaus D McDonald-Maier

Jürgen Schäfer

Gupta Abhay

Richard Tuck

Shane O'Neill

According to various embodiments, a circuit for determining the frequency of a signal is described, comprising an input configured to receive an analog input signal, an analog to digital converter configured to convert the analog input signal to a digital input signal, a digital mixer configured to generate a mixing result signal by mixing the digital input signal with a single bit binary signal having a reference frequency, a low pass filter configured to generate a filtered signal by filtering the mixing result signal, a measuring circuit configured to measure the period of the filtered signal and an output configured to output a value differing from the frequency of the single bit binary signal by the inverse of the measured period as the frequency to be determined.

Circuit for determining the frequency of a signal

Some embodiments disclosed herein relate to a method. In the method, a duration of a first synchronization pulse is measured. A fixed, predetermined number of ticks are equally spaced at a first time interval over the first sync pulse, regardless of the duration of the first synchronization pulse. A duration of a first data pulse is then measured by periodically incrementing a tick count value at the first time interval during the entire duration of the first data pulse. The tick count value at an end of the first data pulse is then correlated to a first digital value encoded on the first data pulse.

Methods and systems for measuring data pulses

A method for allocating bus access rights is used in a multimaster bus system wherein addresses are explicitly allocated to master devices and each master device is assigned a priority value from an organized priority list of priority values. Requests from at least one master device to use the bus system to access a slave device are received, and the priority values of all requesting master devices are compared. If a sole requesting master device has the highest priority value access to the respective slave device is granted to that master device. If a plurality of requesting master devices have the same highest priority value access is successively granted to the requesting master devices having the same highest priority value on the basis of the address allocation of the master devices.

Method and apparatus for allocating bus access rights in multimaster bus systems

A programme-controlled unit comprises a crossbar with a multiplicity of ports, a multiplicity of devices which are connected to the ports of the crossbar and can exchange data via the crossbar, and debug resources for detecting the events and states occurring in the programme-controlled unit. The programme-controlled unit described can be characterized by the fact that the ports of the crossbar comprise a diagnostic port, that the addresses, data and/or control signals which are transmitted between two other ports of the crossbar are additionally also supplied to the diagnostic port, and that the debug resources are connected to the diagnostic port of the crossbar.

Programme-controlled unit with crossbar employing a diagnostic port

A program-controlled unit (e.g., a microcontroller) in which trace information (e.g., selected addresses, data and/or control signals) that is processed by a core and which can be used to trace the profile of the processes occurring within the program-controlled unit, are stored and/or output from the program-controlled unit along with corresponding identification codes that are used by an external debugging system to identify the trace information.

Program-controlled unit

A configuration and method for operating the configuration includes first and second devices connected to one another through a cross bar and accessing one another through the cross bar for reading and/or writing data. When a read access to the second device occurs, the first device reads the data emitted from the second device when it receives a ready signal produced by the second device and supplied to the first device through the cross bar, and, when a write access occurs from the first device to the second device, the first device emits the data to be written to the second device when it receives a ready signal produced by the second device and supplied to the first device through the cross bar and the second device reads the data emitted from the first device when it receives a data valid signal produced by the first device and supplied to the second device through the cross bar.

Configuration and method having a first device and a second device connected to the first device through a cross bar

An A/D converter arrangement comprises an A/D converter ( ) to which analog signals from a plurality of signal channels ( ) can be fed for A/D conversion. With the help of an appropriate control means ( ), converter parameters of the A/D converter ( ) or even other operating parameters of the A/D converter arrangement, such as certain functions performed in response to an A/D conversion which has been carried out for example, are set in a channel-specific way as a function of the signal channel ( ) which is to be converted at the time.

Growing community of inventors

Munich, Germany

Dietmar König