Qimonda Ag

Dieter Andres

Bernhard Ruf

Petra Majewski

Thomas Happ

Jan Boris Philipp

Franz Kreupl

Ulrich Karl Klostermann

Michael Kund

Klaus-Dieter Ufert

Ulrike Gruening-von Schwerin

Ralf Symanczyk

Christian Rüster

Rainer Bruchhaus

Christian Ruester

According to an embodiment, an integrated circuit including a plurality of resistance changing memory cells is disclosed. Each memory cell includes a first electrode, a second electrode and resistance changing memory element arranged between the first electrode and the second electrode. A front surface area of an end section of the first electrode that faces the resistance changing memory element is smaller than a front surface area of an end section of the second electrode that faces the resistance changing memory element.

Integrated circuit

A method for fabricating an integrated circuit, the method comprises forming a first electrode, depositing resistance changing material over the first electrode, the resistance changing material having an active zone for switching the resistance of the resistance changing material and an inactive zone, and forming a second electrode over the resistance changing material. The chemical composition of the resistance changing material in the active zone differs from the chemical composition of the resistance changing material in the inactive zone.

Method for fabricating an integrated circuit including memory element with spatially stable material

An integrated circuit includes a heater element serving as a first electrode, a second electrode, a memory element comprising resistance changing material coupled to the heater element and to the second electrode, and a diffusion compensation region coupled to the heater element and to the resistance changing material. The diffusion compensation region includes a surplus of at least one diffusible species present in the memory element and provides at least one diffusible species to the memory element.

Integrated circuit including memory element with spatially stable material

An integrated circuit includes an array of resistance changing memory cells and a first circuit. The first circuit is configured to set a selected memory cell to a crystalline state by applying a decreasing stair step pulse to the selected memory cell. The pulse is based on a reset current distribution for the array of memory cells.

Integrated circuit for setting a memory cell based on a reset current distribution

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Munich, Germany

Dieter Andres