Commissariat a L'energie Atomique

Commissariat a L'engerie Atomique

Didier Varreau

Didier Lattard

Laurent Ouvry

Bernard Piaget

Jean-Ren&eacute; Lequepeys

Dominique Noguet

Jean-René Lequepeys

Marc Laugeois

Mathieu Bouvier Des Noes

Norbert Daniele

Fabien Clermidy

Christophe Boulanger

Christian Bernard

S&eacute;bastien Leveque

A data processing method in a network on chip formed of a plurality of processors configured to communicate between one another, and at least one network controller configured to initialize communications in the network, the method including: receiving and storing in a memory by a first processor, one or more credit management configuration programs received from the network controller, and establishing a first communication between at least said first processor and at least one second processor.

NoC semi-automatic communication architecture for 'data flows' applications

At transmission, the data to be transmitted is divided into N data blocks, these N blocks are processed in parallel in N M-ary orthogonal keying (MOK) modulation channels, each modulation using a group of spread codes, each channel emitting a signal. All of these signals are transmitted in series. At reception, the signal received is processed in N M-ary orthogonal keying (MOK) demodulation channels, and the blocks obtained are grouped together in series.

Multi-MOK modulation/demodulation transmission process, corresponding transmitter and receiver

The invention relates to a device for exchanging digital data between several sources and at least one hub in a CDMA system, characterised in that it comprises a number n of digital transmission/reception circuits () installed in parallel, each circuit () comprising a transmitter () comprising means of generating an integer number Nof codes that will be used for spectral spreading of data to be transmitted and a receiver () comprising means () of detecting the access of new sources to the CDMA system transmission channel and means () of generating synchronisation signals and power control signals corresponding to each detected new source.

Digital data exchange device in a CDMA system

A receiver for transmission and parallel interference has multiple access interference suppression stages having K channels, each comprising a correlation device corresponding to a particular pseudorandom sequence and interference generation and suppression device. Each stage delivers to the following stage signals at least partly freed from multiple access interferences. A decision stage receives the signals from the channels of the preceding suppression stage. Each decision stage has a correlation device corresponding to one of the pseudorandom sequences and decision device to deliver data. Devices for producing synchronization signals can control the interference suppression and the decision device. The devices producing the synchronization signals have components placed in the channels of the final stage. Further, the synchronization signals produced by these devices control the decision device of the channels of the final stage and the interference estimation device of the at least one interference suppression stages following appropriate time shifts.

CDMA receiver with parallel interference suppression and optimized synchronization

The present invention relates to a digital transmitting/receiving circuit () intended to be mounted on at least one source and on at least one concentrator exchanging binary symbols with the said sources, the said circuit () comprising a transmitter () capable of transmitting the said binary symbols and a receiver () capable of receiving symbols transmitted by a source, the circuit () being characterized in that the transmitter () comprises a first module () intended to generate at least one binary code for effecting the spectral spreading of symbols to be transmitted and a second module () intended to generate at least one internal clock signal for synchronizing the reception of symbols transmitted by a source, and in that the said receiver comprises means () for detecting new sources of transmission and means () for generating synchronization signals and power control signals corresponding to each new source detected.

Transmission/reception digital circuit in CDMA system

The invention relates to a device for exchanging digital data between several sources and at least one hub in a CDMA system, characterized in that it comprises a number n of digital transmission/reception circuits () installed in parallel, each circuit () comprising a transmitter () comprising means of generating an integer number Nof codes that will be used for spectral spreading of data to be transmitted and a receiver () comprising means () of detecting the access of new sources to the CDMA system transmission channel and means () of generating synchronization signals and power control signals corresponding to each detected new source.

A method and an apparatus for transmitting data using multi-MOK modulation/demodulation transmission process corresponding to transmitter and receiver are disclosed. At transmission, the data to be transmitted is divided into N data blocks. The N blocks are processed in parallel in N M-ary orthogonal keying (MOK) modulation channels, each modulation using a group of spread codes, each channel emitting a signal, all these signals (S) are transmitted in series. At reception, the signal received (R) is processed in N MOK demodulation channels and the blocks obtained are grouped together in series.

Multi-mok modulation/demodulation transmission process, corresponding transmitter and receiver

A receiver for transmission and parallel interference has multiple access interference suppression stages having K channels, each comprising a correlation device corresponding to a particular pseudorandom sequence and interference generation and suppression device. Each stage delivers to the following stage signals at least partly freed from multiple access interferences. A decision stage receives the signals from the channels of the preceding suppression stage. Each decision stage has a correlation device corresponding to one of the pseudorandom sequences and decision device to deliver data. Devices for producing synchronization signals can control the interference suppression and the decision device. The devices producing the synchronization signals have components placed in the channels of the final stage. Further ,the synchronization signals produced by these devices control the decision device of the channels of the final stage and the interference estimation device of the at least one interference suppression stages following appropriate time shifts.

A method of processing a pulse response with an adaptive threshold and corresponding receiver. According to the method, an adaptive threshold is calculated that is a function of a maximum reached by the pulse response, noise, and a coefficient adjustable between 0 and 1. The processing only comes into operation for signals that exceed this threshold. Such a method may find application notably to digital radio-communications with spread spectrum.

Method of processing a pulse response with an adaptive threshold and corresponding receiver

In order to obtain the signals necessary for the formation of an interference signal corresponding to the multiple access noise, use is made both of the non-coherent part of the receiver, namely the differential demodulation device, and the coherent part thereof, namely the two matched filters performing the correlations. This gives a reliable, precise, clock symbol signal (Hs) and also the reconstituted data (D(I), D(Q)) and the amplitudes of the signals in the two channels (A(I), A(Q)). Formation then takes place of the correction signal by respreading the data (D(I), D(Q)) and the weighting the respread data by the amplitudes (A(I), A(Q)).

Direct sequence spread spectrum differential receiver with mixed interference signal formation means

A circuit able to operate either as a direct sequence spread spectrum differential signal emitter, or as a generator of interference signals corresponding to multiple access noise. The circuit employs a clock signal formation and data processing module, a differential coding module, a multiplexing module, and a direct sequence spread module when operating as a spread spectrum emitter, and has an additional amplification-inversion module for use when generating an interference signal.

Circuit for direct sequence spread spectrum digital transmissions with generation of an interference signal

A method for processing a direct sequence spread spectrum signal, and a receiver for performing the method. A correlation is preformed between a received signal and the direct sequence used to determine peaks of different amplitudes. The spectrum of the information corresponding to the highest amplitude peak is respread using the direct sequence. The respread signal is subtracted from the received signal to create a new signal. This process is reiterated on the new signal until all of the peaks have been exhausted.

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St Georges de Commiers, France

Didier Varreau