Nxp B.v.

Didem Ernur

Jozef Thomas Martinus Van Beek

Gerhard Koops

Romano Hoofman

Greja Johanna Adriana Maria Verheijden

Johannes Van Wingerden

Wim Van Den Einden

Harold Roosen

The present invention discloses an integrated circuit (IC) comprising a bond pad (); a substrate stack carrying a first layer () comprising conductive regions (); and an interconnect layer () over the first layer () comprising a dielectric material portion () between the bond pad () and the substrate stack, said portion comprising a plurality of air-filled trenches () defining at least one pillar () of the dielectric material (), at least said air-filled trenches () being capped by a porous capping layer (). The interconnect layer (), which typically is one of the uppermost interconnect layers of the IC, has an improved resilience to pressure exerted on the bond pad (). The present invention further teaches a method for manufacturing such an IC.

Integrated circuit manufacturing method and integrated circuit

A method of packaging a micro electro-mechanical structure comprises forming said structure on a substrate; depositing a sacrificial layer over said structure; patterning the sacrificial layer; depositing a SIPOS (semi-insulating polycrystalline silicon) layer over the patterned sacrificial layer; treating the SIPOS layer with an etchant to convert the SIPOS layer into a porous SIPOS layer, removing the patterned sacrificial layer through the porous layer SIPOS to form a cavity including said structure; and sealing the porous SIPOS layer. A device including such a packaged micro electro-mechanical structure is also disclosed.

Microscopic structure packaging method and device with packaged microscopic structure

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Kessel-lo, Belgium

Didem Ernur