Via Technologies, Inc.

Di Dai

Jiin Lai

Zhiqiang Hui

Shanna Pang

Jian Li

Zhi-Qiang Hui

Xin-Xi Li

Shan-Na Pang

Xingchen Chen

Shu-Zhi Hou

A memory management system and method include and use a cache buffer (such as a table look-aside buffer, TLB), a memory mapping table, a scratchpad cache, and a memory controller. The cache buffer is configured to store a plurality of data structures. The memory mapping table is configured to store a plurality of addresses of the data structures. The scratchpad cache is configured to store the base address of the data structures. The memory controller is configured to control reading and writing in the cache buffer and the scratchpad cache. The components are operable together under control of the memory controller to facilitate effective searching of the data structures in the memory management system.

Memory management system and memory management method

A USB host controller is provided. The USB host controller is capable of communicating with multiple USB apparatuses having endpoints and sends a request to a first endpoint. The USB host controller includes a first storage and a first control unit. The first control unit stores endpoint information from the first endpoint into the first storage when the first endpoint issues an unready transaction packet in response to the request. The unready transaction packet indicates that the first endpoint is not ready.

Universal serial bus host controller and control method thereof

A USB host control method is provided for a USB host controller. The USB host controller includes a USB device and a buffer, the USB device includes one or more endpoints. The USB host control method includes the steps of: storing first output data to be sent to a first endpoint into one or more buffer units used for the first endpoint; sending the first output data to the first endpoint; and when a first predetermined response from the first endpoint is received, configuring fake releasing labels and information tags corresponding to the first endpoint in the one or more buffer units, and not releasing the one or more buffer units.

Universal serial bus host control methods and universal serial bus host controllers

A data transmission method for a universal serial bus (USB) host controller is provided. First, input data is received. A cyclic redundancy check (CRC) result of the input data is calculated, and, simultaneously, the input data is transmitted to a system memory of a host. Then, it is determined whether the input data is the last input data of a data packet. When it is determined that the input data is the last input data of the data packet, the CRC result of the last input data of the data packet is calculated. Thus, the CRC result of the data packet is accumulated. The accumulated CRC result is combined with the last input data, and transmitted the combination to the system memory of the host.

Data transmission methods and universal serial bus host controllers utilizing the same

A host module is disclosed, in which an interface is used to couple to at least an electronic device through a serial bus and comprises at least first and second ports. A detection unit reports that one of the first and second ports is enabled and the other is not enabled to a serial bus host driver and enables the interface to perform data transmission with the electronic device connected to the first and second ports through two parallel transmission channels of the serial bus, when the first and second ports are both connected to the same electronic device through the serial bus.

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Taipei, Taiwan

Di Dai