Texas Instruments Corporation

Dhaval Atul Saraiya

David Leonard Larkin

Ashish V Gokhale

Thomas Dyer Bonifield

Byron Lovell Williams

Lily Springer

Shrinivasan Jaganathan

Makoto Takemura

Quang X Mai

An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.

High voltage polymer dielectric capacitor isolation device

The present invention provides an integrated high voltage capacitor, a method of manufacture therefore, and an integrated circuit chip including the same. The integrated high voltage capacitor, among other features, includes a first capacitor plate () located over or in a semiconductor substrate (), and an insulator () located over the first capacitor plate (), at least a portion of the insulator () comprising an interlevel dielectric layer (, or). The integrated high voltage capacitor further includes capacitance uniformity structures () located at least partially within the insulator () and a second capacitor plate () located over the insulator ().

Integrated high voltage capacitor having capacitance uniformity structures and a method of manufacture therefor

The present invention provides an integrated high voltage capacitor, a method of manufacture therefore, and an integrated circuit chip including the same. The integrated high voltage capacitor, among other features, includes a first capacitor plate () located over or in a substrate (), and an insulator () located over the first capacitor plate (), at least a portion of the insulator () comprising an interlevel dielectric layer (or). The integrated high voltage capacitor further includes a second capacitor plate () located over the insulator () and a top-level dielectric layer () located at least partially along a sidewall of the second capacitor plate ().

Integrated high voltage capacitor having a top-level dielectric layer and a method of manufacture therefor

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Allen, TX, United States of America

Dhaval Atul Saraiya