Newlans, Inc.

Integrated Network Corporation

Tdk Corporation

Cisco Technology, Inc.

Narad Networks, Inc.

Ciena Corporation

University of Massachusetts

Spero Devices, Inc.

Dagaz Technologies, Inc.

Dev Vrat Gupta

Zhiguo Lai

Anuj Madan

Craig Alan Sharper

Yu-Ren Brian Chen

Alan E Stone

Subrahmanyam Dravida

Kiran Meghashyam Rege

George E Nohra

Manas Tandon

Kyung-Yeop Hong

Abbie Mathew

Frederick Peralta

Prasad Dorbala

Y Brian Chen

Mehdi Si Moussa

Satya Vrat Gupta

Bouchaib Cherif

Wei Ye

Sriram Narayan

Anthony Monteiro

Kenneth Wood

Gautam Desai

Paiman Nodoushani

Denis Claveloux

Vikram Saksena

John Lo

Subra Dravida

Divi Gupta

Keven Stiffler

Joel T Tarantino

Carlos Cao

Lee Baker

Mohammed Wasef

David S Yoon

Sitaram Dikshitulu

Anoop Jayadevan

Medhi Si Moussa

Ramakrishna Janaswamy

Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.

Apparatus and methods for high voltage variable capacitor arrays with body biasing resistors

Apparatus and methods for variable capacitor arrays are provided herein. In certain configurations, an apparatus includes a variable capacitor array and a bias voltage generation circuit. The variable capacitor array includes a plurality of metal oxide semiconductor (MOS) variable capacitor cells, which include one or more pairs of MOS capacitors implemented in anti-parallel and/or anti-series configurations. In certain implementations, the MOS variable capacitor cells are electrically connected in parallel with one another between a radio frequency (RF) input and an RF output of the variable capacitor array. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the MOS variable capacitor cells.

Apparatus and methods for variable capacitor arrays

Apparatus and methods for high voltage variable capacitor arrays with drift protection resistors

An inductor component includes a plurality of conductive elements, each formed as an individual patch of conductive material, with the conductive elements arranged in a vertical stack and tightly coupled to one another. Dielectric is disposed between more adjacent conductive elements, the dielectric has a permittivity and is sufficiently thin so as to provide a mutual inductance factor of at least one-half or greater between adjacent ones of the conductive elements. The dielectric is typically thinner than the adjacent conductors.

Vector inductor having multiple mutually coupled metalization layers providing high quality factor

Apparatus and methods for high voltage variable capacitor arrays with body-to-gate diodes

Apparatus and methods for high voltage variable capacitor arrays with feed-forward capacitors

Apparatus and methods for high voltage variable capacitors

A signal handler providing high linearity in a small size, applicable across wide operating frequencies and bandwidths, while also adapted to preferred integrated circuit (IC) and printed circuit board technologies. In one implementation, a signal handling apparatus includes an input impedance transformer for receiving an input signal and matching an internal apparatus impedance, a splitter for providing N split signals, a number of signal processing circuits for processing the N split signals, a combiner for combining the N split signals into a combined signal, and output impedance transformer for receiving the combined signal and for matching the internal apparatus impedance to an output impedance of the apparatus. The apparatus may provide filtering, duplexing and other radio frequency signal processing functions. A tunable duplexer may be implemented using a vector inductor and tunable capacitor array with frequency dependent impedance transformers.

Signal handling apparatus for radio frequency circuits

A variable capacitor structure using calibration plates, dual variable distance calibration plates, and/or interleaving extentions to the calibration plates.

Piezo controlled variable capacitor

Embodiments include methods of tuning state variable filters. Examples include state variable filters whose center frequencies can be tuned using variable gain blocks coupled to outputs of filter integrators. First- and second-order state variable filters may operate on signals in parallel and their outputs combined to produce a filtered output. Filters may be tuned to pass or reject signals depending on the application; sample applications include, but are not limited to: agile filtering; spectrum analysis; interference detection and rejection; equalization; direct intermediate-frequency transmission; and single-sideband modulation and demodulation.

Bi-quad calibration

A multi-stage signal handling circuit. Operating as a combiner or splitter, first stage transformers match low input impedance at a first set of differential terminals, and second stage transformers match expected higher impedance at second terminal(s). Transformer windings are mirror image, vertically aligned, meandering conductive tracks disposed on opposite sides of a PCB. Air columns above or below the conductive tracks reduce ground plane effects. A capacitor provided across the differential input terminals of each transformer is chosen to further match the power amplifier output, including consideration of inherent inductance presented by the circuit tracks and vias between transformer sections.

Passive radio frequency signal handler

Apparatus and methods for vector inductors are provided herein. In certain configurations, an apparatus includes a vector inductor comprising a plurality of conductors arranged in a stack and separated from one another by dielectric. The conductors are tightly coupled to one another to provide a relatively high amount of mutual inductance. For example, adjacent conductors in the stack can be mutually coupled with a coupling coefficient k that is at least 0.5, or more particularly, 0.9 or greater. In certain implementations, the conductors are electrically connected in parallel with one another to provide the vector inductor with low resistance. However, tight coupling between the conductors in the stack can result in vector inductor having an overall inductance that is similar to that of a self-inductance of an individual conductor in the stack. The Q-factor of the vector inductor can be increased by the inclusion of additional conductors in the stack.

Apparatus and methods for vector inductors

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Concord, MA, United States of America

Dev Vrat Gupta