Silicon Laboratories Inc.

Derrick Chunkai Wei

Axel Thomsen

David M Pietruszynski

Jerrell P Hein

Yunteng Huang

Ligang Zhang

Kevin G Smith

Ying Shi

Steven P Proffitt

A technique implements high impedance nodes using high threshold voltage devices that may generate less leakage current and may have a higher gate oxide breakdown voltage than standard devices in a particular manufacturing technology. Under at least one operating condition, for a particular power supply voltage, a circuit may be unable to produce a control signal that is sufficient to turn on such a high threshold voltage device. The technique adjusts the control signal voltage to provide a gate-to-source voltage sufficient to turn on the high threshold voltage device. At another power supply voltage, when the circuit is able to produce a control signal sufficient to turn on the high threshold voltage device, the technique does not adjust the control signal.

Utilization of device types having different threshold voltages

A voltage controlled clock synthesizer includes a phase-locked loop (PLL) circuit that receives a timing reference signal, a controllable oscillator circuit, such as a VCO, providing an oscillator output signal, and a feedback divider circuit coupled to the oscillator output signal. The frequency of the oscillator output signal is determined in part according to a stored value used to generate a first digital control signal that determines a divide ratio of the feedback divider circuit. A control voltage present on a voltage control input adjusts the frequency of the oscillator output signal around a frequency determined by the stored value. The control voltage is converted to second digital signal and is utilized in determining the first digital control signal in combination with the stored value.

Voltage controlled clock synthesizer

A technique implements high impedance nodes using high threshold voltage devices that may generate less leakage current and may have a higher gate oxide breakdown voltage than standard devices in a particular manufacturing technology. Under at least one operating condition, for a particular power supply voltage, a circuit may unable to produce a control signal that is sufficient to turn on such a high threshold voltage device. The technique adjusts the control signal voltage to provide a gate-to-source voltage sufficient to turn on the high threshold voltage device. At another power supply voltage, when the circuit is able to produce a control signal sufficient to turn on the high threshold voltage device, the technique does not adjust the control signal.

Selectably boosted control signal based on supply voltage

A switched capacitor input circuit () includes an input buffer (), a switched capacitor sampler circuit (), and an integrator (). The input buffer () has an input terminal for receiving an input voltage, and an output terminal. The switched capacitor sampler circuit () has an input terminal coupled to the output terminal of the input buffer (), and an output terminal. The switched capacitor sampler circuit () includes a capacitor () and stores a charge proportional a voltage at the output terminal of the input buffer () in the capacitor () during a sample period, and transfers the charge from the capacitor () to the output terminal thereof during a transfer period subsequent to the sample period in a plurality of charge portions corresponding to a like plurality of phases of the transfer period. The integrator () has an input terminal coupled to the output terminal of the switched capacitor sampler circuit, and an output terminal for providing an output voltage signal.

Switched capacitor input circuit and method therefor

A switched capacitor sampler circuit () includes an input terminal () for receiving an input voltage, an output terminal (), a capacitor () having first and second terminals, and a switching circuit (). The switching circuit () is coupled to the input terminal (), the output terminal (), and the first and second terminals of the capacitor (). The switching circuit () stores a charge on the capacitor () proportional to the input voltage during a sample period, and transfers the charge from the capacitor () to the output terminal () during a transfer period subsequent to the sample period. The switching circuit () transfers the charge in a plurality of charge portions corresponding to a like plurality of phases of the transfer period.

Switched capacitor sampler circuit and method therefor

An electromagnetically-shielded high-Q inductor may be fabricated within a multi-layer package substrate (MLS). The inductor is preferably constructed as a loop structure on a layer of the MLS, and a shielding structure is formed around the inductor to substantially enclose the inductor in a Faraday cage-like enclosure. The shielding structure includes a top plate formed above the inductor on another layer of the MLS, and a bottom plate formed on yet another layer of the MLS or on a layer of an integrated circuit die which is below and attached to the MLS, preferably using solder bumps. Shielding structure sidewalls may be formed by a ring of stacked vias or via channels. The inductor is preferably connected to stacked vias which provide a connection to the underlying integrated circuit die by way of additional solder bumps and cut-outs through the bottom plate of the shielding structure.

Growing community of inventors

Austin, TX, United States of America

Derrick Chunkai Wei