U.S. Philips Corporation

Crosfield Electronics Limited

Derek John Parkyn

Richard E Bugg

Alexander Hendrich Keuleman

This relates to the modification of the whole, or a substantial part, of an image, for example to the merging of two images or to applying a tint to an image. To achieve this, using only the normal data processing capability provided for handling a single image, two images (I.sub.1, I.sub.2) are stored in first and second portions of a normal image store; for example, if the normal image store has a capacity of 1024.sup.2 pixels, each image may be stored at a resolution of 512.sup.2 pixels. In a further 1-bit store there is stored a mask consisting of alternate 1's and 0's and the mask output is used to select pixels from the two portions of the image store alternately. The mask output also selects multiplying factors A and (1-A) alternately. Then each pixel from the first image, after multiplication by A, is added to an immediately succeeding pixel from the second image after its multiplication by (1-A). The resulting sum signals are used to control an image display (34). This achieves merging of two images within the normal data processing capability provided for one image. When a tint is to be applied to the first image, the same value is used for each pixel of the second 'image'.

Image superimposing system

A circuit arrangement for transmitting binary data elements `0` and `1` by frequency shift using two tone frequencies f0 and f1. The circuit arrangement comprises a modulator, an exclusive OR-gate and an integrator. A data signal DS produces from the modulator a digital signal DSS which by decoding of the integrator results in a tone signal TS comprising f0 or f1. The action of the OR-gate to which both signals DS and DSS are applied causes the amplitude of the tone signal TS to be substantially the same for each of the tone frequencies f0 and f1. The OR-gate may change either the effective resistive input into the integrator for each tone frequency or it may change the amplitude of the signal DSS for each tone frequency.

Data transmission

An interface circuit for coupling a high voltage AC source to a bistable circuit for deriving a low voltage DC output signal at first and second voltage levels dependent on the condition of a switch. The AC voltage is coupled via the switch, a first voltage divider and first diode means to the set input of the bistable circuit and directly via a second voltage divider and second diode means to the reset input of the bistable circuit. The voltage ratios of the two dividers are chosen so that the bistable circuit is set and remains set when the switch is closed and is reset and remains reset when the switch is opened.

High voltage A.C. to low voltage D.C. switching interface circuit

An electronic lockout system for the starter motor of an internal combustion engine includes means for operating the starter motor only if the engine flywheel is stationary. The system also includes means for automatically deenergizing the starter motor when the engine achieves a predetermined rotational speed and independently of the continued operation of the starter switch.

Starter motor lockout system

An electronic lockout system for the starter motor of an internal combustion engine includes means for operating the starter motor only when the engine flywheel is stationary. If the starter switch is released and quickly closed again, the system also includes circuit means by which the starter motor is reoperated immediately provided that the release time is only a few milliseconds.

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Westerham, United Kingdom

Derek John Parkyn