Ansys, Inc.

Deqi Zhu

Norman H Chang

Lang Lin

Jimin Wen

Dinesh Kumar Selvakumaran

Hsiming Pan

Akhilesh Kumar

Wen-Tze Chuang

Ying-Shiun Li

Karthik Srinivasan

Wenbo Xia

En-Cih Yang

Hua Chen

Yu Lu

Joao Moreno Geada

Yi Cao

Shan Wan

Gang Ni

Allen Baker

Xiaoqin Liu

Wei Zhou

William Alan Mullen

Arti Dwivedi

Preeti Gupta

Nitin Kumar Pundir

Kunhua Ma

Calvin Chow

Prabhas Ranjan Kumar

Chao Jiao

Chia-Wei Chen

A method in one embodiment creates a model of an authentic IC for use in comparisons with counterfeit ICs. The model can be created by determining a first or initial set of points of interest (POIs) on the simulated physical (e.g., gate level) layout and simulating side channel leakage from each POI and then expanding the size of the POI and repeating the simulation and comparing successive simulation results (between successive sizes of POIs for a given POI) to determine if a solution for the size of the POI has converged. The final POIs are then processed in a simulation that can use multiple payloads (e.g., cryptographic data) over the entire set of final POIs, and the resulting data set can be used to create the model.

Adaptive leakage impact region detection and modeling for counterfeit chips detection

Circuit design techniques can use a trained predictor to predict key dynamic current metrics (such as peak current, peak time, pulse width and total charge) for a gate in a circuit library, where the predictor has been trained over different combinations of different input transition slews and different output fanout models. A dynamic current model solver can be used for a gate in the cell library to derive waveforms (of current versus time) for the different combinations, and a predictor, such as a neural network, can be trained with the outputs from the solver for the different combinations. The trained predictor can be used in a runtime simulation to solve for the dynamic current demand model of the various gates in a circuit design (such as all of the gates in an integrated circuit).

Dynamic current modeling in dynamic voltage drop analysis

Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network. The trained predictor can be used to determine a temperature rise and then can be appended to a system level thermal profile of the IC to generate a detailed thermal profile of the IC.

Systems and methods for machine learning based fast static thermal solver

Methods, machine readable media and systems for evaluating, through one or more simulations, the leakage of sensitive data in an integrated circuit, such as cryptographic data or keys, are described. The embodiments can use machine learning models, such as one or more neural networks to generate one or more leakage related scores for each portion in a set of portions of the cryptographic data. In one embodiment, leakage data associated the first set of POIs with one or more neural networks is processed by the one or more neural networks to identify the POIs that leak the most and determine one or more scores for each portion in the set of portions of the cryptographic data.

Machine learning for automatic identification of points of interest for side channel leakage

Methods, machine readable media and systems for a method to determine if a model of an integrated circuit (IC) includes a Trojan component are described. In one embodiment, a method can include the following operations: splitting the model of the IC into a plurality of tiles; simulating the IC with an elevated temperature of each tile to predetermined level; computing a temperature-dependent leakage power for each tile; and identifying a tile of the IC as including a Trojan component based on the temperature-dependent leakage power computed.

Systems and methods for a comprehensive and efficient simulation-based methodology on IP authentication and trojan detection

Methods, machine readable media and systems for near-field electromagnetic simulation for side-channel emission analysis of an integrated circuit (IC) are described. In one embodiment, a method can include the following operations: simulating EM field strengths for a plurality of grid partitions of a circuit area of the IC based on a cryptographic work load applied to a model of the IC; identifying one or more of the grid partitions as a security sensitive region for the IC based on the EM field strengths, wherein one or more grid partitions outside of the security sensitive region are identified as non-security sensitive regions for the IC; and simulating EM fields for the IC to perform the EM side-channel emission analysis, wherein contributions of the EM fields from the non-security sensitive regions for the EM side-channel emission analysis are based on a linear superposition of wire currents in the non-security sensitive regions of the IC.

Systems and methods for a fast near-field electromagnetic simulation methodology for side-channel emission analysis

Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. The methods can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC); performing a thermal simulation for each respective template of the IC based on a sequence of power patterns of tiles of the respective template; and training a neural network with a plurality of training data collected via thermal simulations performed for the templates of the IC. These systems and methods can use a machine learning predictor, that has been trained to determine a transient temperature rise across an entire IC, and then append the determined transient temperature rise to a system level thermal profile of the IC.

Predicting on chip transient thermal response in a multi-chip system using an RNN-based predictor

Methods, machine readable media and systems for performing side channel analysis are described. In one embodiment, a method can determine, from a gate level representation of a circuit in a layout on a die of an IC, a first set of paths through the circuit that process security related data during operation of the circuit, the circuit including a second set of paths that do not process security related data; and the method can further determine, in a simulation of power consumption in the first set of paths but not the second set of paths, power consumption values in the first set of paths to determine potential security leakage of the security related data in the circuit. The method can further determine, from the power consumption values, positions in the layout for inserting virtual probes on the die for use in measuring security metrics that indicate potential leakage of the security related data. The insertion of the virtual probes is relative to the actual simulated layout of the die. Other methods, machine readable media and systems are also described.

Security information extraction and probe insertion for side-channel analysis

Methods, machine readable media and systems for performing side channel analysis are described. In one embodiment, a method, performed on a data processing system, can receive input data that contains an RTL representation of a design of a circuit and then determine, from the input data, a set of registers that store security related data during operation of the circuit, wherein the set of registers are a subset of all of the registers in the design. The method then determines, in a simulation of power consumption of the set of registers in the RTL representation, security metrics that indicate a level of potential leakage of security related data such as secret or private cryptographic keys.

Register transfer level based side channel leakage assessment

Methods, machine readable media and systems for simulating the leakage of sensitive data in an integrated circuit, such as cryptographic data or keys, are described. In one embodiment, a method can include the following operations: performing a first dynamic voltage drop (DVD) simulation on a plurality of locations, distributed across an integrated circuit (IC), based on a physical model that specifies physical layout of components on the IC, the IC storing sensitive data in locations of the layout; performing an IC level side channel correlation analysis between each of the locations and the sensitive data based on the results of the first DVD simulation; and selecting, based upon the IC level side channel correlation analysis, a subset of the locations for further simulations to simulate leakage of the sensitive data. Other methods, media and systems are disclosed.

Layout-based side-channel emission analysis

Computationally efficient methods of determining a transient supply current in a circuit are disclosed. The methods include offline simulation of circuit models to obtain time series of signal currents which are used in a dynamic simulation to calculate equivalent capacitances for a cell model of the circuit. The equivalent capacitances may be used in the simulation to compute estimates of noise current in a power distribution network.

Dynamic modeling method for dynamic power noise simulation

Computer-implemented systems and methods are provided for modeling a charge pump. A relationship between an output voltage of the charge pump and a loading condition is determined. A frequency-domain analysis is performed at multiple frequencies to determine an impedance function representative of the charge pump's impedance at each of the multiple frequencies. A vector-fitting algorithm is applied to approximate the impedance function using a plurality of poles and residues. A circuit is synthesized based on the plurality of poles and residues. A model for the charge pump is generated, where the model includes the synthesized circuit and components that model the relationship between the output voltage and the loading condition.

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San Jose, CA, United States of America

Deqi Zhu