Cista System Corp.

Advanced Micro Devices Corporation

Omnivision Technologies, Inc.

Ariba, Inc.

Dennis Tunglin Lee

Guangbin Zhang

Matthew James Fischer

Hirofumi Komori

Jingzhou Zhang

Tiejun Dai

Zhe Gao

Dinesh Shahane

Kiran Gangadharappa

Chengcheng Xu

Wenhao Qiao

Oikwan Tsang

Harshad Chavan

Mark William Knecht

Kalaine Mak Wong

Pixel designs with reduced LOFIC reset and settling times are disclosed herein. In one embodiment, a pixel cell includes a photosensor configured to photogenerate image charge in response to incident light, a floating diffusion to receive the image charge from the photosensor, a transfer transistor coupled between the floating diffusion and the photosensor to transfer the image charge to the floating diffusion, and a first reset transistor coupled between the floating diffusion and the voltage supply. The pixel cell further includes a capacitor having two ends, and a second reset transistor. A first end of the capacitor is coupled to the floating diffusion. The second reset transistor is coupled between a second end of the capacitor and the voltage supply.

Pixel designs with reduced LOFIC reset and settling times

A system is provided for generating a ramping signal. The system includes a plurality of storage circuits each including an input and an output. The output of a previous storage circuit is connected to the input of a next storage circuit. The storage circuits are configured to propagate a first enable signal based on a first control signal. The system also includes a plurality of first current generating circuits. Each first current generating circuit is coupled to the output of a corresponding storage circuit to receive the propagated first enable signal. The first current generating circuits are configured to generate a first current signal based on the propagated first enable signal.

Method and system for generating a ramping signal

A high dynamic range sensing device is disclosed. The device may comprise an array of Bayer-pattern units of color filters, each of the color filters corresponding to a pixel of the sensing device, and each of the color filters overlapping with a plurality of photodiodes.

System and method for high dynamic range image sensing

A device for generating a ramp signal with a changing slope is disclosed. The device may comprise a processor configured to generate a variable signal. The device may also comprise a phase-locked loop (PLL) circuit configured to receive the variable signal and a reference clock signal, generate a changing ramp clock signal based on the variable signal and the reference clock signal, and output the generated changing ramp clock signal as an input of an analog-to-digital-converter (ADC) circuit.

System, method, and apparatus for generating a ramp signal with a changing slope

In an example embodiment, a disaster is detected at a primary data center and, in response to the detection, a system switches over from the primary data center to a secondary data center such that searches from one or more client applications are routed to the secondary data center. Then, for each document stored in a search core of the secondary data center: a count is requested for the document from a first client application, it is determined whether the count for the document from the first client application matches a count for the document from the search core of the secondary data center, and, in response to a determination that the count for the document from the first client application does not match a count for the document from the search core of the secondary data center, a full publish for the document is requested from the first client application.

Delta replication of index fragments to enhance disaster recovery

The present invention relates to an integrated circuit having a flexible reference. In an example, the integrated circuit includes a reference generator, and the reference generator can generate a flexible reference signal in response to a control signal. The flexible reference signal can be changed freely by adjusting the control signal. By providing the flexible reference, the present invention can enhance the capability of verification and characterization for an integrated circuit design and reduce the physical layout area of the integrated circuit design. The present invention also relates to a method of operating the integrated circuit with a flexible reference signal.

Integrated circuit having flexible reference

A switch circuit including structures to reduce the effects of charge injection. In an embodiment, a first transistor of the switch circuit is to receive a first signal and first and second dummy transistors of the switch circuit are each to receive a second signal, wherein the first transistor is connected between the first and second dummy transistors. The second signal is complementary to the first signal. In another embodiment, the first transistor, the first dummy transistor and the second dummy transistors are each connected via respective body connections to a first low supply voltage.

CMOS image sensor switch circuit for reduced charge injection

A comparator circuit for generating a signal representing a comparison of an input signal and a reference signal. In an embodiment, the comparator circuit includes a first stage and a second stage to provide respective signal amplification, where switch circuitry of the second stage switchedly couples respective elements of the first and second stages. The comparator circuit further includes a third stage to generate an output signal based on an intermediate signal of the second stage. In another embodiment, feedback circuitry of the comparator circuit is to selectively control a voltage of the output stage based on the output signal.

Comparator circuit for reduced output variation

An input buffer for an integrated circuit and providing reduced sensitivity to input noise present in a transmission line environment. This input buffer deskews an input signal where the rise time is much slower than the fall time, such as that from an open-collector output driver, so that the rising edge propagation delay and falling edge propagation delay of the input buffer are approximately equal.

Transmission-line-noise immune input buffer

A system for providing a non-integer division of a single clock signal in a communication device, the communication device including at least two modules is provided. In a system aspect, the system includes first and second divider circuits within one module of the at least two modules, the first and second divider circuits dividing the single clock signal to produce a first clock signal and a second clock signal. The system further includes logic means within the one module and coupled to the first and second divider circuits, the logic means logically combining the first and second clock signals to produce a non-integer division of the single clock signal for use by the other module of the at least two modules.

Growing community of inventors

San Jose, CA, United States of America

Dennis Tunglin Lee