Semiconductor Components Industries, LLC

Dennis Robert Engelbrecht

Richard A Mauritzson

Robert Arthur Black

Cornelis Daniel Hoekstra

Raymond Allen Davis

Agustin B Hernandez

Yan Ping Lim

An image sensor may include an array of photodiodes and readout circuitry. A group of adjacent photodiodes in the array may be covered with a first color filter element that transmits a first color light and an additional group of adjacent photodiodes may be covered with a second color filter element that transmits a second color light. The group of photodiodes may share a floating diffusion node. The array may be operable in a low resolution mode in which the readout circuitry reads out image signals corresponding to a sum of charges generated by the group of photodiodes and in a high resolution mode in which the readout circuitry reads out image signals corresponding to charges generated by each of the photodiodes from the shared floating diffusion node. The photodiodes in the group may capture charge using different integration times for generating high-dynamic-range images.

Imaging systems having image sensor pixel arrays with sub-pixel resolution capabilities

An imaging system with real-time digital testing capabilities verifies the functionality of image processing circuitry used to process pixel data signals read out from a pixel array during imaging operations. Image processing circuitry may process a data frame read from an imaging array that includes multiple regions of imaging and non-imaging data. Digital test patterns may be generated to test the functionality of specific image processing blocks. Test patterns may correspond to or represent imaging data or non-imaging data from regions of the output readout frame. A checksum generator generates a test pattern checksum for output of a subset of the image processing blocks that were provided with a given test pattern. The test pattern checksum may be compared to a predetermined checksum of the output of properly functioning image processing blocks provided with test patterns equivalent to the given test pattern.

Imaging systems with real-time digital testing capabilities

An imager with error verification capabilities may include an array of pixels and an array of error detection circuits. The array of pixels may receive control signals that control the array of pixels to produce image pixel signals. The error detection circuits may receive the control signals and produce error detection signals. The image pixels and error detection signals may be conveyed over a readout path to image processing circuitry such as an external digital signal processor for detecting control signal errors. Each error detection circuit may be a modified copy of a corresponding pixel in the pixel array or may be a read only memory element. The array of error detection circuits may produce unique values that may be compared to expected values to detect whether correct control signals are provided to the pixel array for a given mode of operation.

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Philomath, OR, United States of America

Dennis Robert Engelbrecht