International Business Machines Corporation

Dennis P Bouldin

Timothy Harrison Daubenspeck

William Thomas Motsiff

James Gardner Ryan

Stanley Roberts

Dale P Hallock

A structure and method of fabricating a metallization fuse line is disclosed. The structure can be formed on a semiconductor substrate, including an insulator structure formed on the substrate, the insulator structure having an upper layer and a lower layer, the upper being thinner than the lower, the insulator structure having a plurality of openings of varying depth, and a metal structure inlaid in the insulator structure, the metal structure having first and second portions and a third portion there between that is substantially more resistive than the first and second portions, the third portion having a thickness substantially- similar to the thickness of the upper layer of the insulator structure. The upper layer includes a nitride, the lower layer includes an oxide and the metal structure includes copper. The fuse structure allows formation of &ldquo;easy to laser delete&rdquo; thin metal fuses within segments of thick metal lines. This applies to wiring layers formed from &ldquo;high&rdquo; melting temperature metals and those defined using a damascene process. For example, copper back end of line (Cu BEOL) damascene wiring, as used with CMOS can use the invention. The technique achieves high yield fusing for technologies that use thick wiring layers. The structure separates the thickness of the fuse segment from the remainder of the wiring line. The structure can be used with very thick, e.g., >1.2&mgr; wiring and very thin, e.g., <0.5&mgr; fuses.

Method for making a pedestal fuse

A structure and method of fabricating a metallization fuse line is disclosed. The structure can be formed on a semiconductor substrate, including an insulator structure formed on the substrate, the insulator structure having an upper layer and a lower layer, the upper being thinner than the lower, the insulator structure having a plurality of openings of varying depth, and a metal structure inlaid in the insulator structure, the metal structure having first and second portions and a third portion there between that is substantially more resistive than the first and second portions, the third portion having a thickness substantially similar to the thickness of the upper layer of the insulator structure. The upper layer includes a nitride, the lower layer includes an oxide and the metal structure includes copper. The fuse structure allows formation of &ldquo;easy to laser delete&rdquo; thin metal fuses within segments of thick metal lines. This applies to wiring layers formed from &ldquo;high&rdquo; melting temperature metals and those defined using a damascene process. For example, copper back end of line (Cu BEOL) damascene wiring, as used with CMOS can use the invention. The technique achieves high yield fusing for technologies that use thick wiring layers. The structure separates the thickness of the fuse segment from the remainder of the wiring line. The structure can be used with very thick, e.g., >1.2 &mgr; wiring and very thin, e.g., <0.5 &mgr; fuses.

Pedestal fuse

A structure and method of fabricating a metallization fuse line is disclosed. The structure can be formed on a semiconductor substrate, including an insulator structure formed on the substrate, the insulator structure having an upper layer and a lower layer, the upper being thinner than the lower, the insulator structure having a plurality of openings of varying depth, and a metal structure inlaid in the insulator structure, the metal structure having first and second portions and a third portion there between that is substantially more resistive than the first and second portions, the third portion having a thickness substantially similar to the thickness of the upper layer of the insulator structure. The upper layer includes a nitride, the lower layer includes an oxide and the metal structure includes copper. The fuse structure allows formation of &ldquo;easy to laser delete&rdquo; thin metal fuses within segments of thick metal lines. This applies to wiring layers formed from &ldquo;high&rdquo; melting temperature metals and those defined using a damascene process. For example, copper back end of line (Cu BEOL) damascene wiring, as used with CMOS can use the invention. The technique achieves high yield fusing for technologies that use thick wiring layers. The structure separates the thickness of the fuse segment from the remainder of the wiring line. The structure can be used with very thick, e.g., >1.2&mgr; wiring and very thin, e.g., <0.5&mgr; fuses.

Method and test structures for accurately flagging metal failure on a semiconductor wafer include a monitor structure and a control structure, each of which has a plurality of metal segments. At least one metal segment of the monitor structure has a length prone to failure, while the length of the metal segments in the control structure are such that the control structure is resistant to metal failure. The monitor and control structures are predesigned to have equal resistance when there is no metal failure and a measurable resistance difference upon metal failure in that segment of the monitor structure prone to failure. Upon detecting metal failure in the test device, the wafer is flagged as potentially having metal failure in active circuitry interconnect wiring.

Test device and method for signalling metal failure of semiconductor

A method for diffusing a conductivity determining impurity in a semiconductor substrate and making electrical contact thereto by depositing a conductive layer made of a rare earth hexaboride material containing a predetermined amount of silicon in it over a surface portion of the substrate and heating the substrate for a predetermined period of time at a predetermined temperature which is sufficient to cause boron from the hexaboride material to diffuse into the adjoining portion of the substrate to modify its conductor characteristics. At the same time a good electrical ohmic contact is established between the conductive layer and the adjoining substrate portion while the conductive layer retains its conductivity even after the outdiffusion of some of its boron into the substrate during the heat treatment. A silicon dioxide layer is also formed on the exposed surface of the silicon containing hexaboride material through the oxidation of the silicon disposed close to the exposed surfaces of the hexaboride material.

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Essex Junction, VT, United States of America

Dennis P Bouldin