Allen-bradley Company, LLC

Dennis M Wright

Kendal R Harris

Makoto Shichi

Satoshi Yamashita

Tomoyuki Nanami

Mamabu Hayakawa

A digital filter with a reduced filtering time. On/off data provided by eight contacts are read at predetermined time intervals, and the on/off data are stored in 8-bit binary data. (four-to one-cycle-previous data and new data). Logical AND and logical OR between the data are carried out to obtain AND result X and OR result Z, logical operations between the previous result In-1 and AND result X is carried out to obtain a result Y, and logical AND between the result Y and the OR result Z is carried out. A bit 'A' whose AND result X is '1' is set again to '1', and a bit B whose OR result Z is '0' is set again to '0'.

Logical operator based digital filter

The present invention provides a switching device incorporating a simple circuit capable of avoiding the flash-on of a transistor when a power supply is turned on and off thereby reducing the OFF delay time. The output circuit comprises a FET (145) having a drain and a source connected in series to a current line for supplying a current from a power supply (VD) to an output detector (load) (L), and a photocoupler (149) for applying a driving voltage across the gate and the source of the FET (145) according to the output of an internal circuit (151), a differentiation circuit comprising a capacitor (7) and resistors (5,9) is connected across the drain and the source of the FET (145), and second transistor (3) having a collector and an emitter connected to the gate and the soruce of the FET (145) is driven by a charging current for charging the capacitor (7). When a voltage applied across the drain and the source of the FET (145) starts rising, the second transistor (3) is turned on to turn off the FET (145) forcibly.

Growing community of inventors

Eastlake, OH, United States of America

Dennis M Wright