Microelectronics and Computer Technology Corporation

Advanced Micro Devices Corporation

Dennis J Herrell

Omkarnath R Gupta

Richard D Nelson

Thomas P Dolbear

David A Gibson

Claude Hilbert

Lawrence N Smith

Mathias Boettcher

Thomas Hirsch

Ollie C Woodard, Sr

A low impedance electrical pathway from decoupling capacitance located on a circuit board to an integrated circuit chip. The integrated circuit includes multiple power and ground C4 bumps and is positioned on a first side of an integrated circuit carrier which is positioned on a first side of a circuit board. The integrated circuit carrier includes lateral conductors such as voltage and ground power planes. Power and ground carrier vias extend from the voltage and ground power planes, respectively, to the first side of the carrier, and power and ground subgroups of carrier vias extend from the voltage and ground power planes, respectively, to power and ground solder balls on a second side of the carrier. The circuit board includes power and ground plated through holes extending from contact pads on the first side of the circuit board to contact pads on a second side of the circuit board. Decoupling capacitors are positioned on the second side of the circuit board. The decoupling capacitors have positive and negative electrodes are electrically coupled to the power and ground plated through holes respectively. The C4 power and ground bumps, the power and ground carrier vias, the power and ground carrier via subgroups, the power and ground solder balls, the contact pads, the power and ground plated through holes, and the positive and negative electrodes are arranged in anti-parallel tessellations to reduce the inductance of a loop circuit from the decoupling capacitors to the integrated chip circuit.

Low inductance power distribution system for an integrated circuit chip

A technique has been developed whereby crosstalk induced in a first electrical connection by current flow at an adjacent second electrical connection is at least partially cancelled by an opposing crosstalk signal induced at an inductive coupling between electrical traces extending from or toward the first and second electrical connections, respectively. Crosstalk cancellation is provided by orienting the electrical traces such that current flow through the second electrical connection and respective electrical trace induces an opposing crosstalk signal at the inductive coupling. In some configurations, an inductive coupling between electrical traces includes essentially parallel portions of the traces and an aperture in a voltage plane. In some configurations, cancellation of crosstalk induced by multiple adjacent electrical connection is provided. Crosstalk inducing electrical connections include pins, solder bumps, leads, wires, edge connectors, etc. In various configurations, crosstalk cancellation is provided on a board, on a semiconductor package, or on a semiconductor integrated circuit. The crosstalk inducing electrical connections may be integral with the board, package or integrated circuit or may be mated therewith.

Crosstalk cancellation for integrated circuit package configuration

In an integrated circuit carrier having a large number of power pins allocated to an internal power plane, the current flowing through the power pins may divide very unevenly, and result in current flow through some of the power pins which exceeds the maximum specification for either the package pin or for the socket into which the package may be inserted. In such a package, the magnitude of the current flowing through the highest current power pin may be reduced by configuring the resistance of the power plane(s) and vias to provide approximately the same total resistance to every power pin location. Slots may be cut in a package power plane to alter the current path and raise the impedance of the conduction path between some of the package power pins and the internal contact pads otherwise having the lowest impedance. If the package, such as a pin-grid-array package, includes more than one row of pins along an edge of the package, the internal package vias may be arranged to provide an impedance from die footprint to the outer row of pins which is not substantially higher than that of the inner row of pins. In this fashion the aggregate current carrying capacity of the carrier may be increased by reducing the difference in current flow between power pins having the highest current flow and power pins having the lowest current flow. The current flow through all the power pins may then be operated nearer to the design maximum of the particular connector used, or the design maximum of the carrier itself.

Integrated circuit carrier arrangement for reducing non-uniformity in current flow through power pins

An arrangement for a motherboard having a connector for a removable module is disclosed which increases the aggregate current carrying capacity of the connector by reducing the difference in current flow between power pins of the connector having the highest current flow and power pins of the connector having the lowest current flow. The current flow through all the power pins may then be operated nearer to the design maximum of the particular connector used. Thicker power planes within the motherboard (as well as within the module) reduce the effective resistance per square of the power plane, and help distribute the current more uniformly to a greater number of power pins of the connector. The use of multiple power planes in parallel also achieves a lower effective resistance. Multiple power terminals connecting the source of regulated power supply voltage (or reference voltage, such as ground) to the power plane may be used instead of just one power terminal. Moreover, placing a pair of power terminals symmetrically about a line perpendicular to the connector which bisects the power pins of the connector helps distribute the current flow through the power plane to the power pins. By placing the power terminal (or terminals) at least a certain distance from the connector (e.g., at least 15 mm), a more uniform current flow through the connector is achieved.

Arrangement for reducing non-uniformity in current flow through various power pins within a printed wiring board connector for a removable module

A decoupling capacitor structure formed integral with an integrated circuit chip and over top of circuitry defined thereon advantageously provides decoupling capacitance in close electrical proximity to switching circuits of the integrated circuit chip without substantially affecting die footprint. In contrast with on-die gate oxide capacitor configurations, a decoupling capacitor structure formed toward the back end of processing, typically after interconnect metal, allows large area capacitor structures without substantial impact on area available for devices and circuitry. Inductance associated with the intervening portion of a power supply loop circuit between switching circuits of the integrated circuit chip and the decoupling capacitor structure can be extremely low in configurations in accordance with the present invention. In some configurations, connection points, e.g., bonding pads and/or solder bumps for conveying power supply voltages, are defined over top of the decoupling capacitor structure.

Decoupling capacitor configuration for integrated circuit chip

An integrated circuit chip configuration, e.g., a microprocessor, includes feedback control circuitry defined thereon to control mid-frequency components of current demand of the integrated circuit chip and thereby regulate power supply voltage to within design tolerances of the integrated circuit chip. Such mid-frequency components can be generated by directed changes in operating frequency of the integrated circuit chip or by cyclic or episodic variations in circuit activity, e.g., instruction sequence dependent variations. When generated, such mid-frequency components can excite mid-frequency resonances in a power distribution system and generate power supply voltage disturbances. In some configurations, the integrated circuit chip includes current dump circuitry defining a controlled impedance path between first and second power supply voltage terminals of the integrated circuit chip. The controlled impedance path allows the feedback control circuitry to actuate a variable current draw so as to reduce mid-frequency components of overall current demand of the integrated circuit chip and thereby regulate power supply voltage disturbances. In other configurations, the feedback control circuitry is coupled to on-chip clock circuits, e.g., a phase-locked loop (PLL), to actuate variations in a clock signal supplied to the integrated circuit chip and thereby regulate power supply voltage disturbances.

Power surge management for high performance integrated circuit

An article provides sealing of an electronic component connected to a mating fluid heat exchanger by providing a diaphragm with an opening shaped to fit about the heat exchanger, the opening forming a sealing lip. A clamping ring, which expands and contracts as a function of temperature is placed around the lip of the diaphragm and subject to a temperature to shrink the clamping ring against the lip and heat exchanger for sealing the diaphragm thereto. Preferably the clamping ring is a shape memory alloy metal. In addition, a compressible metal seal may be placed between the lip and the heat exchanger to increase the ability to seal.

Diaphragm sealing apparatus

An electrical beam switch for interconnection between a plurality of inputs and outputs and includes a two-dimensional array of electrically charged particle emitters and an array of detectors facing the emitter array for receiving charged particles from various of the emitters. X and y electrical deflectors are positioned adjacent each of the emitters for directing the charged particles from each of the emitters to a selected one or more of the detectors. A screen lens may be positioned adjacent the array of detectors for focusing the directed beams on to the selected detector.

Electrical beam switch

A fluid heat exchanger for cooling an electronic component having a housing for receiving heat from the electronic component in which the housing has a fluid inlet and an outlet at opposite ends of the housing. The cross-sectional area of the housing for conveying fluid from the inlet to the outlet decreases from the inlet to the outlet thereby reducing pressure drop without sacrificing thermal performance. The cross-sectional area may be decreased by tilting a top of the housing relative to a bottom, or providing a plurality of fins separated by channels in which the cross-sectional area of the channels decreases from the inlet to the outlet.

Low pressure high heat transfer fluid heat exchanger

A high performance fluid heat exchanger for cooling an electronic component which includes a housing having a base, a plurality of parallel fins in the housing, a center fed inlet connected to the housing opposite the base for supplying cooling fluid towards the base and toward the ends of the fins. A plate is positioned between the tops and bottoms of the fins and extends generally parallel to the base and extends towards but is spaced from the ends of the fins for providing a double cooling pass against the fins.

Fluid heat exchanger for an electronic component

A high performance fluid heat exchanger for cooling an electronic component which includes a housing having a base heat transfer member, a plurality of parallel fins in the housing and center fed concentric inlet and outlet tubes connected to the housing opposite the base for supplying cooling fluid towards the base and to the ends of the fins.

A fluid heat exchanger for mating with an electronic component is supported from a fixed support. A connection between the fixed support and the heat exchanger is initially flexible for adjusting the position of the heat exchanger to accommodate variations in the height or attitude of the electronic component for providing a good thermal interface. Thereafter, the connection changes to a rigid connection to provide good structural suppport for the heat exchanger which allows the support to withstand vibration or shock without overloading the electronic component. The flexibility of the connection may be reversible for later readjusting the position of the heat exchanger relative to the electronic component.

Method and apparatus for adjustably mounting a heat exchanger for an

A high density, high performance and high fidelity connector system that can connect between electronic circuit planes having different wiring densities. The connector has a modular structure that avoids tolerance build-up for large (long) connections between two substrates, or between a substrate and a board. The connector design can accommodate differential temperature coefficients of expansion between the connector materials and the materials of the substrates being connected. The connector can be formed from low cost printed circuit board technology, or its equivalent, and can be configured to have controlled impedance, low crosstalk and wide bandwidth. The angle between surfaces being interconnected can vary from 0 to 360 degrees.

Growing community of inventors

Austin, TX, United States of America

Dennis J Herrell