Texas Instruments Corporation

Dennis G Mannering

Xiaolin Lu

Song Wu

Alan Gatherer

Donald Phillip Shaver

Murtaza Ali

Gene A Frantz

Michael Oliver Polley

Udayan Dasgupta

Yaqi Cheng

Walter Y Chen

Domingo G Garcia

Douglas B Weiner

William C Timm

Umashankar S Iyer

Terence J Riley

Narasimhan Venkatraman

Paul E Schurr

Channamallesh Hiremath

Austin Paul Hunt

Shahedolla Molla

A client premises digital subscriber line (DSL) modem having multi-mode capability is disclosed. In initialization, the modem estimates whether channel conditions are such that digital processing of the received data according to a lower data rate DSL standard, such as ADSL2, may result in a higher effective data rate than receipt and processing according to a higher data rate DSL standard, such as ADSL2+. If so, the DSL modem configures itself, such as by configuring its filter characteristics and sampling frequency, to receive and process data according to the lower data rate DSL standard; the transmitting modem, for example at a central office or service area interface, may continue to operate according to the higher data rate standard (with its bit loading corresponding to a subset of subchannels). The receiving DSL modem processes the payload data according to the lower standard, while processing control messages according to the higher standard.

Receiver-side selection of DSL communications mode

A method ( ) of communicating bit groups between a first DSL modem (M ) and a second DSL modem (M ). The method receives ( ) at the first DSL modem a plurality of bit groups (FF -FF ) from the second DSL modem. Each of the plurality of bit groups comprises a plurality of bit sub-groups (W -W ), and each of the plurality of bit sub-groups has an order of location. For each of the plurality of bit groups, the method determines ( ) whether bits of at least one sub-group having a common order of location comprise at least one erroneous bit. In response to this determination, the method stores ( ) in the first DSL modem a record (InMaskBuff) of whether the at least one sub-group having the common order of location comprises at least one erroneous bit. From this record, various other steps ( ) may be taken in the preferred embodiment, including suppressing ( ) the at least one sub-group from communicating valid information from the second DSL modem to the first DSL modem.

Circuits, systems, and methods for error elimination in a digital subscriber line modem

A computer system ( ) comprising a first DSL modem (M ) for communicating data packets (MG , MG , MG ) with a second DSL modem (M ) after a connection is established between the first DSL modem and the second DSL modem. The data packets are for communication from the first DSL modem to the second DSL modem at a downstream communications rate and for communication from the second DSL modem to the first DSL modem at an upstream communications rate. The computer system further comprises a memory (MEM ) operable to store a computer program ( ), where in one embodiment this computer program is an operating system. The computer program is operable to require a data parameter indicating a number of data packets which may be communicated in an instance from the computer program to the first DSL modem for communication to the second DSL modem. Lastly, the computer system further comprises a field (e.g., SendWindow field) for providing the data parameter to the computer program, wherein the number is responsive to the ratio of the downstream communications rate relative to the upstream communications rate.

Digital subscriber line device driver using communication window size based on relative data rates of upstream and downstream communications

A discrete multitone (DMT) digital subscriber loop (xDSL) telecommunication system has a transmitter portion including a bit encoder, inverse fast Fourier transform (FFT), parallel-to-serial converter, digital-to-analog converter and line driver for transmitting data signals to a twisted pair telephone line and a receiver portion including an analog-to-digital converter, serial-to-parallel converter, forward FFT and bit decoder for receiving data signals from the twisted pair telephone line. The FFT's are implemented in 19-bit precision using a fixed point 16-bit processor. At each FFT stage, the number of sign bits in the FFT input data is examined to determine whether overflow is possible during multiply and add operations. The input data is downscaled by right shifting one or two bits if overflow is possible. If downscaling occurred, the output data is rescaled after completion of the FFT operation. If overflow is not possible, no scaling is done. By using variable scaling to downscale only when necessary, better overall precision is maintained.

Variable scaling of 16-bit fixed point fast fourier forward and inverse

A method to estimate the bit loading on each tone of a DMT digital subscriber loop system is disclosed. A generic bit-mapping table is given for different sizes of constellations to save memory space.

Bit loading and rate adaptation on DMT DSL data transmission

A method of communicating bit groups between a first DSL modem and a second DSL modem. The method receives at the first DSL modem a first bit group from the second DSL modem. The first bit group comprises a flow control bit in a fixed location within the first bit group. In response to the flow control bit being in a first state, the method transmits a second bit group from the first DSL modem to the second DSL modem, wherein the second bit group consists of filler data. In response to the flow control bit being in a second state, the method transmits a third bit group from the first DSL modem to the second DSL modem, wherein the third bit group comprises data other than filler data.

Message frame and flow control in a digital subscriber line

A modem communication system with receiving and transmission paths includes a direct equalizer system having an adaptive filter (1532) in the transmission path to compensate for frequency distortion of the communication channel. The transmitter filter coefficients are adapted by a filter coefficient calculator (1528), under control of a data detector (1526) which detects incoming data in the receiving path. A switch (1534) is controlled by status of a transmit output data buffer to multiplex either the training sequence or output data into the transmission path. When the buffer is idle, the training sequence generator (1540) is linked to a digital-to-analog (D/A) converter (1536) and line driver (1538). The receiving path includes an isolation switch (1520), a receiver amplifier (1522) and a slicer (1524). The receiver correlates the received training sequence with a known training sequence and updates the equalizer filter coefficients using an adaptation algorithm, such as a least mean squared algorithm. A first embodiment utilizes a high speed digital programmable filter (1532). Another embodiment utilizes a data buffer (1533) which is periodically filled with data filtered by a digital signal processor (DSP).

Multimode digital modem

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Garland, TX, United States of America

Dennis G Mannering