Massachusetts Institute of Technology

The Charles Stark Draper Laboratory, Inc.

Baylor College of Medicine

Houston Advanced Research Center

Dennis D Rathman

Bernard B Kosicki

R Allen Murphy

Robert K Reich

Barry E Burke

Wendell Eugene Rhine

Daniel J Ehrlich

Mark Alexander Hollis

William L Robbins

Michael E Hogan

William D Goodhue

John S Haggerty

Richard Hart Mathews

George B Kenney

David C Shaver

Brian F Aull

Rajender S Varma

Daniel R Schuette

Mitch D Eggers

Julia Sigalovsky

Annamarie Lightfoot

Robert P Berger

Jonathan C Twichell

Chang-Lee Chen

Bernard Kosicji

Michael Rose

Richard Osgood

Embodiments of the present invention include an electron counter with a charge-coupled device (CCD) register configured to transfer electrons to a Geiger-mode avalanche diode (GM-AD) array operably coupled to the output of the CCD register. At high charge levels, a nondestructive amplifier senses the charge at the CCD register output to provide an analog indication of the charge. At low charge levels, noiseless charge splitters or meters divide the charge into single-electron packets, each of which is detected by a GM-AD that provides a digital output indicating whether an electron is present. Example electron counters are particularly well suited for counting photoelectrons generated by large-format, high-speed imaging arrays because they operate with high dynamic range and high sensitivity. As a result, they can be used to image scenes over a wide range of light levels.

Single-electron detection method and apparatus for solid-state intensity image sensors with a charge splitting device

Single-electron detection method and apparatus for solid-state intensity image sensors with a charge-metering device

A large format imager includes an array of pixels for converting electromagnetic radiation into electrical signals and a trigger to from an optical pulse so as to trigger the pixels to generate an integration period. Each pixel includes a photodiode to convert light intensity of high-frequency radiation into an electrical charge, a reset switch to reset the photodiode, circuitry to enable sampling of the electrical charge produced by the photodiode, a photoswitch to convert an optical trigger pulse, received from the trigger, into an electrical signal, an inverter to produce a control signal corresponding to the electrical signal produced by the photoswitch, and control circuitry to locally generate integration control signals. The integration control signals control a start of an integration period for the photodiode, duration of the integration period for the photodiode, and the sampling of the electrical charge produced by the photodiode. The large format imager may also include a trigger for producing an electrical pulse so as to trigger the pixels to generate an integration period and tree type electrical distribution system for propagating the electrical pulse to all the pixels, wherein each pixel includes a global repeater circuit to propagate a first edge of said electrical pulse along said tree type electrical distribution system and a local repeater circuit to provide a local array of pixels with the first edge of the electrical pulse.

Method and system for distribution of an exposure control signal for focal plane arrays

A charge-coupled device imager including an array of super pixels disposed in a semiconductor substrate having a surface that is accessible to incident illumination. For each super pixel there is provided a plurality of subpixels which each correspond to one in the sequence of image frames. Each subpixel includes a doped photogenerated charge collection channel region opposite the illumination-accessible substrate surface, a charge collection channel region control electrode, doped charge drain regions adjacent to the channel region, a charge drain region control electrode, and a doped charge collection control region. To each subpixel are provided channel region and drain region control voltage connections, for independent collection and storage of photogenerated charge from the substrate at the charge collection channel region of a selected subpixel during one in the sequence of image frames and for drainage of photogenerated charge from the substrate to a drain region.

High-speed, high-sensitivity charge-coupled device with independent pixel control of charge collection and storage

A method and apparatus are disclosed for identifying molecular structures within a sample substance using a monolithic array of test sites formed on a substrate upon which the sample substance is applied. Each test site includes probes formed therein to bond with a predetermined target molecular structure or structures. A signal is applied to the test sites and certain electrical, mechanical and/or optical properties of the test sites are detected to determine which probes have bonded to an associated target molecular structure.

Optical and electrical methods and apparatus for molecule detection

An electronic device package is provided, consisting of reaction bonded silicon nitride structural and dielectric components and conductor, resistor, and capacitor elements positioned with the package structural components. The package consists of a ceramic package base characterized by a dielectric constant less than 6, of reaction bonded silicon nitride, or a heat spreader material. An electrical conductor is positioned on, embedded in, or attached to the package base for making electrical contact to an electronic device supported on the base and in preferred embodiments, a resistor is attached to the package base. The invention also provides package sidewalls connected to the package base, preferably of reaction bonded silicon nitride, and at least one electrical conductor extending to an outside surface of the package sidewalls for making electrical contact to an electronic device supported by the package base. The reaction formed electronic device packages of the invention provide the ability to support high device signal frequencies, high device operational temperatures, and high environmental temperatures, due to the characteristics of the package materials. The reaction formed electronic device packages of the invention may be produced with a nitriding process during which the overall package structure exhibits minimal shrinkage. As a result, the reaction formed electronic device packages of the invention may be shaped to finished dimensions before the nitriding process with complicated and tight-tolerance geometries of package structural, conducting, resistive, and capacitive components.

Net-shape ceramic processing for electronic devices and packages

A method of producing electronic device packages is provided, consisting of the steps of shaping a package preform and heating the package preform in a nitrogen-containing atmoshpere to nitride the package preform. The shaped package preform may consist of package base, sidewall, conductor, resistor, or capacitor components. The package base and sidewall components may be formed of silicon powder. The method also accommodates the step of inserting a semiconducting material into the package preform and heating the semiconducting material component along with the package preform. The inserted semiconducting material component may be processed to define active electronic device areas on the component either before or after the step of heating the shaped package preform and inserted semiconducting material component. The package production methods of the invention provide the ability to produce reaction bonded structural and dielectric package components by way of a nitriding process that causes minimal overall shrinkage of the package. As a result, reaction formed electronic device packages of the invention may be shaped to finished dimensions before the nitriding process with complicated and tight-tolerance geometries of package structural, conducting, resistive, and capacitive components. The package production methods of the invention also provide the ability to interleave electronic device and packaging manufacturing sequence steps, resulting in increased manufacturing efficiency, as well as improved performance in the devices and packages produced. Device substrates or partially fabricated devices may be embedded into semi-finished packages, whereby completion of device fabrication coincides with completion of package fabrication. This makes possible the fabrication of active devices and circuits in a fully packaged environment.

Growing community of inventors

Ashland, MA, United States of America

Dennis D Rathman