Micronas Gmbh

Dejan Lazich

Miodrag Temerinac

Herbert Alrutz

Sebastian Kaluza

Micaela Wuensche

Steffen Schober

The invention relates to a circuit for generating a true, circuit-specific and time-invariant random binary number, having: a matrix of K&#x2212;L delay elements that can be connected to each other by means of L&#x2212;1 single or double commutation circuits into chains of delay elements of length L, a single or double demultiplexer connected before the matrix, a single or double multiplexer connection after the matrix, and a run time or number comparator, wherein the setting of the commutation circuits, the demultiplexer, and the multiplexer can be prescribed by a control signal, wherein the circuit comprises a channel code encoder whereby code words of a channel code can be generated and a transcriber, whereby code words of the channel code can be transcribed into the control signal of the L&#x2212;1 single or double commutation circuits, and a method for generating a true, circuit-specific and time-invariant random number by means of a matrix of L&#x2212;K delay elements, L&#x2212;1 single or double commutation circuits, a single or double demultiplexer connected before the matrix, a single or double multiplexer connection after the matrix, and a run time or number comparator, comprising at least the steps a) generating a code word of a channel code, b) transcribing a code word of a channel code to a selection code, c) generating chains of L delay elements by setting a setting corresponding to the code word of the selection code for the L&#x2212;1 single or double commutation circuits, the single or double demultiplexer, and the single or double multiplexer, d) pairwise comparing of two variables determined by the delay times of two chains defined by the setting of the L&#x2212;1 commutation circuits corresponding to the code word of the channel code, by means of a number or delay comparator for generating a bit of the true, circuit-specific and time-invariant random number.

Circuit and method for generating a true, circuit-specific and time-invariant random number

A method for generating random numbers in which oscillating digital output signals of unequal or equal periodicity are generated by at least two ring oscillators, an external parity signal representing a logical state being generated when an odd number of the output signals take on a specified logical state, the external parity signal being fed back to an external parity input of each of the respective ring oscillators. Also, a random number generator having at least two ring oscillators made up of independently freewnning inverter chains with feedback having an odd number of series-connected inverters that generate oscillating digital output signals of unequal or equal periodicity, and having first panty signal generating mechanisms that generate an external parity signal representing a logical state when an odd number of the output signals take on a specified logical state.

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Stutensee, Germany

Dejan Lazich