Dell USA L P

Tata Consultancy Services Limited

Other

Dell Computer Corporation

Deepak N Swamy

Scott H Estes

Arpan Pal

Balamuralidhar Purushothaman

Chirabrata Bhaumik

James S Bell

Victor K Pecone

Prateep Misra

Venkatramanan Siva Subrahmanian

Aniruddha Sinha

Avik Ghose

Joseph Daniel Mallory

Thomas J Kocis

David R Lunsford

H Scott Estes

David Staggs

Andrew W Moore

Soumitra Naskar

Sumanta Ghosh

Michael D Ohlinger

Robert B Petty

Prashant Mohanan

Debnarayan Kar

Piyush Agarwalla

Suman Adak

Aniket Roy

Sumanta Saha

Santosh Kumar Mohan

Olivia Roy

Ipsita Banerjee

There are many administrative processes which require a user to enter handwritten data on ordinary paper forms. This data is then further processed and converted in the digitized form. In the existing methods, the turnaround time for whole process is high, lacks accuracy of the digitized data, and cost is also on the higher side. A system and method for real time digitization of hand written input data has been provided. The system comprises an input device that utilizes a pen and paper input form which is filled by a user in his hand writing. The completed form data is then transferred to a form inspector application that runs on the aggregation device. It allows for applications to be verified for completeness and send the same for real-time digitization using a form processor application. A recognition engine is then used for the digitization of the hand written input data.

System and method for real time digitization of hand written input data

A method and system for real-time analytics of sensor-based data is disclosed. Also disclosed is a Cloud-based Paltform-as-a-Service (PaaS) offering for sensor driven applications with services and features for their complete life-cycle management including prompt development, testing, deployment and so forth. The method of the present disclosure enables real-time tracking of various physical parameters and attributes related to smart-spaces using sensor devices implemented in the premises of the smart-space environment and using crowd-sourced user input data. Further, the parameters obtained are sent to the cloud-computing server, wherein the analytics are performed in real-time based on the obtained parameters.

Computer platform for development and deployment of sensor data based applications and services

A computing platform for intelligent development, deployment and management of vehicle telemetry applications is disclosed herein. Further, the present disclosure provides a method and system that enables provision of Intelligent Transportation Service on the Cloud-based Platform that facilitates creation and deployment of vehicle telemetry applications configured for enabling traffic measurements, traffic shaping, vehicle surveillance and other vehicle related services.

Computer platform for development and deployment of sensor-driven vehicle telemetry applications and services

A computer system includes a motherboard to which a selected one of various processor boards can be coupled via an adaptor. The boards include a CPU and a heat transfer member. The adaptor includes core logic such as a Northbridge module and power control circuitry. The adaptor is pin connectable to the motherboard and the various processor boards are each pin connectable to the adaptor. Alternatively, the adaptor and processor boards can be replaced with a processor module including features of the processor boards and the adaptor. The processor module is also pin connectable to the motherboard at the same connection used by the adaptor.

Adaptor board interconnection for a processor board and motherboard

In a circuit board/IC package assembly the die cavity in the IC package body portion is filled with a thermally conductive liquid to substantially facilitate the transfer of operational die heat toward the inner, lid side of the IC package that faces the circuit board. To dissipate the die heat received by the die cavity lid, a spaced series of metal-plated through holes are formed in the circuit board. The metal plating portions of the through holes are engaged with an internal ground plane structure within the circuit board, and are thermally coupled to the IC package die cavity lid. Accordingly, during operation of the IC package, die heat is conducted to the ground plane structure sequentially through the die cavity liquid, the cavity lid, and the metal-plated through holes. In another embodiment of the assembly, the circuit board through holes are replaced with a circuit board opening through which a heat sink structure passes, the heat sink structure being thermally coupled on one side thereof to the die cavity lid. The other side of the heat sink structure engages a metal chassis section which interiorly engages the outer plastic housing wall of a computer.

Circuit board-mounted IC package cooling and method

A ceramic package for an integrated circuit (IC) and a method of manufacturing the ceramic package. The package comprises: (1) a ceramic body having opposing substantially planar first and second surfaces thereon, a cavity in the body and a plurality of vias passing through the body and intercepting the first and second surfaces, (2) an integral IC located within the cavity, (3) a plurality of electrical conductors located on the surfaces, passing through the plurality of vias and coupled to the IC, the plurality of conductors adapted to allow communication of electrical signals through the body and with the IC and (4) first and second electrical connectors located on the first and second surfaces, respectively, the first electrical connector allowing an optional IC to be removably mounted to the package and coupled to the plurality of electrical conductors, the second electrical connector allowing the package to be mounted to a supporting circuit board, the package thereby allowing the integral and optional ICs to communicate the electrical signals therebetween and with the circuit board.

Ceramic integrated circuit package with optional IC removably mounted

Circuit board-mounted IC package cooling apparatus

A hybrid multichip module and method for fabricating same provides a cost-effective interconnection of semiconductor chips combining the advantages of modern MCM-D technology with modern MCM-L technology. In a preferred embodiment, the hybrid multichip module has semiconductor chips mounted to an MCM-D structure and interconnected by an MCM-L structure via solder columns.

Hybrid multichip module and methods of fabricating same

A system and method for monitoring the temperature of a heat-producing electronic component located on a circuit board and a method of manufacturing therefor. The system includes: (1) an electrically-conductive trace of predetermined dimensions formed integrally with the circuit board, the trace having a temperature-dependent electrical property, a temperature of the electronic component affecting the electrical property and (2) an overtemperature detection circuit coupled to the trace for measuring the electrical property. The detection circuit provides, in response thereto, an overtemperature signal to thereby indicate that the temperature of the electronic component has exceeded a predetermined level. Preferably, the system is used to protect a microprocessor in a personal computer ('PC') from overheating.

Embedded thermistor for on-board thermal monitoring of electrical

A leadless high density connector including a plurality of connector pins each having multiconductor pins electrically connected to solder balls on the back side of the connector for interconnection to a PWB. The solder balls form a ball grid array (BGA), which replaces thin gull wing leads used on connectors of prior art. The use of BGA technology as applied to high density connectors provides a plurality of benefits associated with BGA technology. The signal carrying capacity of the connector is increased since the bottom surface of the connector is available for interconnecting signal paths rather than being limited to the peripheral edges as common for leaded packages. The resulting profile of the connector is substantially reduced allowing increased component and wiring density. The resulting bond strength using BGA technology is greater than that with a leaded equivalent due to the increased bond surface area and resulting anchoring effect. Therefore, BGA technology allows significantly increased yields over connectors using leads as known in prior art. The electrical characteristics of a connector according to the present invention is substantially improved since the inductance per pin is reduced using BGA as compared to leads. In this manner, connectors according to the present invention are more suitable for high speed applications especially when combined with the ability to interleave ground and signal connections.

Leadless high density connector

An interconnect sheet for connecting multiple layers of a circuit board for the manufacture of high interconnect density PWBs. The interconnect sheet preferably comprises an area array grid of 0.003 inch solder columns having a 0.006 inch pitch. The interconnect sheet is preferably used to attach two or more multi-layer boards by placing one sheet at every interconnect surface. This interconnect mechanism has an advantage of redundancy of contact and therefore lower susceptibility to failure than other methods. The interconnect sheet of the present invention also offers a large tolerance for registration error without shorting adjacent pads. The preferred method of fabrication of the interconnect sheet begins with creating equally spaced holes through a 0.5 ounce double sided laminate comprising a dielectric sheet and copper plates on either side of the dielectric. These holes are filled with solder paste and the sheet undergoes a baking process to shrink the paste. The remaining copper is then etched away using an alkaline etcher. The solder essentially acts as its own etch resist and thus remains. The solder is then reflowed causing it to ball, thus forming an interconnect sheet comprising a dielectric with a plurality of solder balls arranged throughout the dielectric.

Anisotropic interconnect methodology for cost effective manufacture of

An inexpensive method for fabricating a staggered edge connector for a circuit board. The method is cost effective and includes numerous advantages over the prior art, including allowing more area for signal routing and removing the problems associated with capacitive stubs on edge connector traces associated with prior art designs. The method begins with creating a staggered plurality of blades or fingers. A plating bus is formed on these staggered blades by connecting a gold plating bus to one of the contact pads and then shorting together or connecting the signal lines via a shorting bus. The shorting bus is placed flush with the innermost edge of the edge connector well outside of the actual wipe area of the connectors. The board then undergoes a standard semi-additive process, as well as a final etch and subsequent gold plating. The shorting bar is then drilled out. Due to the placement of the shorting bar flush with the innermost edge of the edge connectors, the resultant vias do not occupy valuable signal routing area. Further, the drilling operation does not produce any capacitive stubs, thereby alleviating any cosmetic or performance problems associated with capacitive stubs, while not adding any additional time or cost to the board.

Method and apparatus for making staggered blade edge connectors

A circuit board design featuring a fine pitch ball grid array ('BGA') having a simplified construction. The circuit board comprises: (1) an insulating substrate, the substrate having a via therethrough, (2) a conductive layer located over the substrate, the via passing through the layer and laterally uninterrupted through the circuit board, (3) a first solder having a first melting point located within and substantially blocking the via and (4) a second solder having a second melting point located over the blocked via, the second melting point lower than the first melting point, the first solder remaining substantially solid and preventing the second solder from substantially entering the via when the first and second solders are heated to a temperature between the first and second melting points. The present invention eliminates precision drilling required by current blind via BGA pad designs.

Circuit board having an improved fine pitch ball grid array and method

To facilitate the registered connection between a BGA package and an associated multi-tiered circuit board, a spaced series of vias are formed transversely through the board substrate between its opposite first and second sides. A spaced series of relatively shallow, circularly cross-sectioned socket areas, offset from the vias, are also formed on the first side of the circuit board. The sockets have diameters slightly larger that those of the generally ball-shaped leads of the BGA package, and are positioned on the same centerline pattern as the leads. After the vias and sockets are formed, a metal plating material is deposited on their interiors and around their open ends on the first board side, with the plating being extended across the first board side between associated socket and via pairs. A solder mask is then extended along the first board side, outwardly over the plating material thereon, the mask having circular cutout areas coaxial with the plated sockets and having diameters slightly larger than the diameters of the plated sockets. Using a high precision pick and place machine, the BGA package is placed against the first board side in a manner causing the BGA leads to partially enter the plated sockets, the sockets facilitating the registration between the BGA leads and the lead connection areas of the plating material. Finally, the socket-received BGA leads are soldered to the plating portions of their associated sockets.

Growing community of inventors

Austin, TX, United States of America

Deepak N Swamy