Mediatek Corporation

Analog Devices,inc.

Deepak Mathew

Liang Ma

Aiguo Yan

Timothy Perrin Fisher-Jeffes

Jonathan Richard Strange

Carsten Aagaard Pedersen

Eric Aardoom

Zoran Zvonar

John Zijun Shen

Timothy Fisher-Jeffes

Krishnan Vishwanathan

Abhay Sharma

Marko Kocic

Lidwine Martinot

Paul Donald Krivacek

Thomas Keller

Thomas F Howe

Prahallada Ponnathota

David Stephen Ivory

Russ Mestechkin

A bit rate processor in a wireless system includes a front end processor to process physical channel data and to generate encoded transport channel data, a transport channel buffer to hold the encoded transport channel data, and a back end processor to process the encoded transport channel data from the transport channel buffer and to generate decoded transport channel bits. The front end process may include a frame buffer that receives the physical channel data, a first stage to de-map the physical channel data, an intermediate frame buffer that receives the de-mapped physical channel data, and a second stage to process the de-mapped physical channel data and to provide the encoded transport channel data. The back end processor may include a third stage, including a scaling circuit to scale the encoded transport channel data, a decoder to decode the scaled transport channel data, a CRC checker and an output buffer.

Interface between chip rate processing and bit rate processing in wireless downlink receiver

Re-quantization in downlink receiver bit rate processor

A method includes receiving data in a first data processing module, and enabling a second data processing module when at least one signal time slot of the received data comprises data that complies with a first data transmission standard. The method also includes exchanging signals between the first data processing module and software executing in a processor, and determining that a software configuration of the second data processing module has been completed. The method also includes processing the data in the second data processing module for the at least one signal time slot, and enabling a third data processing module upon a completion of processing at least one data block in the second data processing module, and determining that a software configuration of the third data processing module has been completed, the at least one data block comprising multiple signal time slots.

Data flow control in wireless communication systems

An apparatus for processing signals in a wireless system includes a first memory module to receive input data from a set of physical channels, a first plurality of sub-modules to process the input data. Each of the first plurality of sub-modules is selected to function based upon data and transmission channel specifications. The apparatus also includes a second memory module to receive processed input data and output intermediate data. Locations of the input data in the second memory is allocated in connection with data and transmission channel specifications. The apparatus also includes a second plurality of sub-modules to process the intermediate data. Each of the second plurality of sub-modules is selected to function based upon data and transmission channel specifications. The apparatus also includes a third memory module to receive and output bit rate processing output.

Multi-mode bit rate processor

A wireless device has a BRP-CRP interface that includes a dual-port frame memory having a first access port and a second access port in which data can be written to the dual-port frame memory through the first access port at the same time that data is read from the dual-port frame memory through the second access port. A bit rate processor performs bit rate processing on input data and writes data resulting from the bit rate processing to the dual-port frame memory through the first access port. A chip rate processor reads data from the dual-port frame memory through the second access port and performs chip rate processing on the data read from the dual-port frame memory. A data processor executes a software application that writes data to the dual-port frame memory through the first access port and reads data from the dual-port frame memory through the second access port.

TD-SCDMA uplink processing

A system includes a receiver for receiving a modulated signal. The receiver includes a gain estimator for converting complex data representative of constellation points of the modulated signal into scalar data representation. The gain estimator is configured to fold a first portion of the scalar data representation onto a second portion of the scalar data representation. The gain estimator is further configured to estimate a constellation gain value from the folded first portion and the second portion of the scalar data representation.

Parameter estimation for modulated signals

A system and method are provided for determining whether a chipping code from a group of codes is used in a signal. In one embodiment of the invention, a signal is received and each code from the group is correlated with the received signal. The ratio of the highest correlation value to the second highest correlation value is calculated. If the ratio exceeds a threshold, the chipping code may be determined as the chipping code used in the signal. In another embodiment, the ratio of the highest correlation value and the total received power of the signal is calculated. If the ratio exceeds a threshold, the chipping code may be determined as the chipping code used in the signal.

Method and apparatus for code identification in wireless applications

A technique for allocating fingers in a path searcher of a multipath receiver involves determining a required number of fingers for each multipath region, determining a number of allocated fingers for each multipath region according to an area-based weighting scheme such that each multipath region that is allocated fewer than its required number of fingers is deemed to have a non-zero residual area, allocating any surplus fingers to multipath regions having non-zero residual areas until either no surplus fingers remain or each multipath region is allocated its required number of fingers, and placing any fingers allocated to each multipath region within the multipath region. Placing the fingers in un-resolvable path scenario involves detecting path location at the edges of multipath region; placing fingers at the edges and placing remaining fingers uniformly between the first and the last path such that the there is a minimum placement separation between the fingers.

Finger allocation for a path searcher in a multipath receiver

Growing community of inventors

Wilmington, MA, United States of America

Deepak Mathew