Intel Corporation

Deepak Gandiga Shivakumar

Jianfang Olena Zhu

Abhishek R Appu

Joydeep Ray

Altug Koker

Travis T Schluessler

Ankur N Shah

Jonathan Kennedy

Chia-Hung Sophia Kuo

Bo Qiu

Kim Pallister

Nikhil Talpallikar

Virendra Vikramsinh Adsure

Ajit Krisshna Nandyal Lakshman

Brandt M Guttridge

Frank J Soqui

Anand Srivatsa

Cristiano J Ferreira

Mohan J Kumar

Murugasamy K Nachimuthu

Robert J Royer, Jr

Deepak Samuel Kirubakaran

Jianwei Dai

Dan J Williams

Tiffany J Kasanicky

Amir Ali Radjai

Ivan Chen

Taeyoung Kim

Krzysztof Rusocki

Nicholas Moulin

An example apparatus includes processor circuitry to execute instructions to determine memory usage data associated with a user profile, determine an address hashing policy based on the memory usage data, and determine power states of memory channels based on the address hashing policy.

Methods and apparatus to adapt memory channel usage on a per-user basis

Examples include techniques to reduce memory power consumption during a system idle state. Cores of a single socket multi-core processor may be mapped to different virtual non-uniform memory architecture (NUMA) nodes and a dynamic random access memory (DRAM) may be partitioned into multiple segments that are capable of having self-refresh operations separately deactivated or activated. Different segments from among the multiple segments of DRAM may be mapped to the virtual NUMA nodes to allow for a mechanism to cause memory requests for pinned or locked pages of data to be directed to a given virtual NUMA node.

Techniques to reduce memory power consumption during a system idle state

Systems, apparatuses and methods may provide for technology that exchanges activation information between system firmware and an operating system (OS), wherein the activation information includes one or more of status information, activation state information, capability information, activation time information or quiesce time information. The technology also conducts a runtime upgrade of the device firmware based on the activation information, wherein the runtime upgrade bypasses a reboot of the computing system.

Interface and warm reset path for memory device firmware upgrades

An embodiment of an electronic processing system may include an application processor, system memory communicatively coupled to the application processor, a graphics processor communicatively coupled to the application processor, graphics memory communicatively coupled to the graphics processor, and persistent storage media communicatively coupled to the application processor and the graphics processor to store one or more graphics assets, wherein the graphics processor is to access the one or more graphics asset mapped from the persistent storage media. The persistent storage media may include a low latency, high capacity, and byte-addressable nonvolatile memory. The one or more graphics assets may include one or more of a mega-texture and terrain data. Other embodiments are disclosed and claimed.

Graphics memory extended with nonvolatile memory

Growing community of inventors

Hillsboro, OR, United States of America

Deepak Gandiga Shivakumar