Brocade Communications Systems, Inc.

Foundry Networks, Inc.

Deepak Bansal

Mani Kancherla

David B Cheung

Sridhar J Devarapalli

Sam Htin Moy

Yuen Fai Wong

Mehrdad Hamadani

Bing Wang

Ivy Pei-Shan Hsu

Lok Yan Hui

Vahid Naraghi

Steenivasulu Malli

Avinash Jindal

Sreenivasulu Malli

A network device includes a plurality of blades, each having a plurality of CPU cores that process requests received by the network device. Each blade further includes an accumulator circuit. Each accumulator circuit periodically aggregates the local counter values of the CPU cores of the corresponding blade. One accumulator circuit is designated as a master, and the other accumulator circuit(s) are designated as slave(s). The slave accumulator circuits transmit their aggregated local counter values to the master accumulator circuit. The master accumulator circuit aggregates the sets of aggregated local counter values to create a set of global counter values. The master accumulator circuit transmits the global counter values to a management processor (for display), to the CPU cores located on its corresponding blade, and to each of the slave accumulator circuits. Each slave accumulator circuit then transmits the global counter values to the CPU cores located on its corresponding blade.

Load balance connections per server in multi-core/multi-blade system

A multi-processor architecture for a network device that includes a plurality of barrel cards, each including: a plurality of processors, a PCIe switch coupled to each of the plurality of processors, and packet processing logic coupled to the PCIe switch. The PCIe switch on each barrel card provides high speed flexible data paths for the transmission of incoming/outgoing packets to/from the processors on the barrel card. An external PCIe switch is commonly coupled to the PCIe switches on the barrel cards, as well as to a management processor, thereby providing high speed connections between processors on separate barrel cards, and between the management processor and the processors on the barrel cards.

Multi-processor architecture using multiple switch fabrics implementing point-to-point serial links and method of operating same

Multi-processor architecture implementing a serial switch and method of operating same

Techniques that offer enhanced diversity in the selection of paths (e.g., ECMP paths) and/or ports from ports associated with trunks for forwarding network data traffic. In one embodiment, a network device uses a rotate function to generate a rotated index (path index) that is used to select a path (e.g., an ECMP) path from multiple paths (e.g., multiple ECMP paths) for forwarding a packet. A network device may also generate a rotated index (trunk index) that is used to select an output port from multiple output ports associated with a trunk for forwarding the packet.

Selection of trunk ports and paths using rotation

A packet classifier and a method for routing a data packet are provided. The packet classifier includes a content addressable memory, a translation table and a parameter memory. The method includes looking up a content addressable memory for a base address into a parameter memory using a header of the data packet. The base address is related to the routes under ECMP for forwarding the data packet. From among these addresses, using multiple headers of the data packet, an adjustment to the base address is computed. The adjustment specifies an actual address to the parameter memory corresponding to a selected route for forwarding the data packet. The parameter memory is then accessed using the actual address to obtain parameter values relevant to the selected route. The data packet is then forwarded according to the parameter values thus obtained.

System and method for ECMP load sharing

Growing community of inventors

San Jose, CA, United States of America

Deepak Bansal