International Business Machines Corporation

Deepak Anantarao Kulkarni

Rui Fang

David K Watts

Shom Ponoth

Michael Wayne Lane

James Darrell Heath

Grama Kasturi Harish

Lee Emison Hagy

Satyanarayana Venkata Nitta

William F Quinn

Chakravarthy Jagannadhan

David K H Watts

Satyanayana V Nitta

An integrated circuit including an active region a passive region and a cut line in the passive region includes a passivation layer that includes an outer nitride layer over an oxide layer. The integrated circuit also includes a crack stop below the passivation layer and in the passive region, and a solder ball in the active region. The passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer.

Semiconductor chips including passivation layer trench structure

An electrical contact method. An axle having an axis of rotation is provided. Cantilever arms are provided. Each cantilever arm has a first end and a second opposing end. The first end is connected to the axle. Each cantilever arm extends radially outward from the axle about perpendicular to the axis of rotation. At least two electrically conductive contacts is provided. At least one electrically conductive contact of the at least two electrically conductive contacts is disposed on the second end of each cantilever arm. A sample is supported on a support member. The electrically conductive contacts are pressed against a first surface of the sample. After the electrically conductive contacts are pressed, the electrically conductive contacts are revolved about the axis of rotation, wherein the at least one electrically conductive contact remains in electrical contact with the first surface.

Electrical contact method

Methods and structures. A planarization method includes: providing a contact structure, where the contact structure includes an axle configured to rotate about an axis of rotation, a plurality of cantilever arms, each arm having a first end connected to the axle, where each arm extends radially outward from the axle; and a plurality of electrically conductive spheres, where at least one sphere is disposed on a second end of each arm; placing a substrate in contact with the spheres, applying an electric voltage to the axle, where the voltage transfers to the substrate, where responsive to the transfer an electrochemical reaction occurs on the substrate; rotating the axle, wherein the spheres revolve about the axis, wherein at least one sphere remains in electrical contact with the substrate; and electrochemical-mechanically planarizing the substrate. Also included is a contact structure, an electrical contact, and an electrical contact method.

Electrical contact structures and methods for use

A method, process and system for the recycling of electrochemical-mechanical planarization slurries/electrolytes as they are used in the back end of line of the semiconductor wafer manufacturing process is disclosed. The method, process and system includes with the removal of metal ions from slurries using ion exchange media and/or electrochemical deposition.

Recycling of electrochemical-mechanical planarization (ECMP) slurries/electrolytes

A method and system for pad conditioning in an electrochemical mechanical planarization (eCMP) tool is disclosed. A polishing pad having a pad electrode is placed onto a platen of the eCMP tool. A conditioning disk, having a second electrode is placed on the polishing pad, such that the pad electrode and conditioning disk form an electrode pair. An electric potential is established between the conditioning disk and the pad electrode. This causes debris from the polishing pad to become ionized, and attracted to the conditioning disk. The conditioning disk is then removed from the eCMP tool, allowing the eCMP tool to resume operation on normal semiconductor wafers.

Method and system for pad conditioning in an ECMP process

A method and means for enhancing an embedded system includes a technique for generating shared library information which is stored in the ROM, the shared library information including pointers to structures for each shared library to be preloaded into the ROM, maintaining each module per library as a linked list. When the ROM image is generated, the tool writes the structures describing the preloaded libraries into the ROM image. As pointers to the structures are not valid in the ROM image, the pointers to these modules are relocated so that they are valid in the loader's address space when remapped into the loader by the kernel. At system start-up or &ldquo;boot,&rdquo; the kernel starts the embedded loader and maps the structures exactly where the loader expects to find them. Thus, when the loader attempts to load an external dynamically linked ELF executable file that is linked to one of the shared libraries in the ROM, the loader resolves all references to the preloaded library by traversing the structures provided that were mapped into its address space by the system kernel.

Method and system for loading libraries into embedded systems

A method and means for enhancing an embedded system includes means for and steps of executing a boot routine; activating a ROM loader routine; initializing an I/O subsystem; activating an embedded OS; creating a dynamically linked embedded system loader task, and having the embedded OS map the Global Coerced Memory (GCM) and the Global Shared Memory (GSM) into its address space so that it can access shared libraries; loading each of a plurality of executable programs, and mapping the GCM and the GSM into each executable program's address space so it is able to access shared libraries.

Growing community of inventors

Austin, TX, United States of America

Deepak Anantarao Kulkarni