Analog Devices International Unlimited Company

Analog Devices Global

Debopam Banerjee

Mark Alan Lemkin

Michael C W Coln

Sandeep Monangi

Venkata Aruna Srikanth Nittala

Maitrey Kamble

Systems, devices, and methods related to time-interleaved polyphase linearization for a receive signal chain are provided. An example receive signal chain includes an input node to receive a radio frequency (RF) signal. The receive signal chain further includes a plurality of polyphase mixer circuitries including first mixers and first local oscillators to generate a plurality of phase-shifted downconverted signals based on the received RF signal. The receive signal chain further includes a first multiplexer to select one of the plurality of phase-shifted downconverted signals during each time slot of a plurality of time slots. The receive signal chain further includes signal conditioning circuitry comprising at least one nonlinear component. The signal conditioning circuitry conditions, during each time slot, a respective selected one of the plurality of phase-shifted downconverted signals to generate a conditioned signal. The receive signal chain further includes analog-to-digital-converter (ADC) downstream of the signal conditioning circuitry.

Receive chain linearization via time-interleaved and polyphase mixing of interleaved paths

A frontend circuit for a radio frequency (RF) receiver comprises an RF amplifier circuit to receive an RF signal, a local oscillator (LO) circuit to produce a LO signal, a mixer circuit configured to mix the RF signal with the LO signal to produce a down-converted intermediate frequency (IF) signal, a transimpedance amplifier (TIA) circuit to receive the IF signal, and an error reduction circuit operatively coupled to the TIA circuit and configured to reduce voltage error caused by error charge from parasitic capacitance of the frontend circuit.

Method and apparatus to reduce inter symbol interference and adjacent channel interference in mixer and TIA for RF applications

A reference buffer circuit comprises a dual-difference amplifier circuit including a first differential input, a second differential input, and a differential output that provides a differential reference signal; a first reference voltage coupled to a first input of the first differential input and a second reference voltage coupled to a first input of the second differential input; and wherein outputs of the differential output are connected by a feedback circuit path to second inputs of the first and second differential inputs.

Differential reference buffer for analog-to-digital converters

An electronic circuit comprises a comparator circuit including an input circuit stage and an output circuit stage, and an input stage supply circuit coupled to a circuit supply rail and the input circuit stage. The input stage supply circuit includes a voltage generator circuit and a regulating circuit. The voltage generator circuit includes a replicate circuit of a portion of the input circuit stage to generate a voltage that is less than a voltage of the circuit supply rail and varies with the voltage of the circuit supply rail and device parameters of the replicate circuit. The regulating circuit generates a regulated input stage supply using the generated voltage.

Comparator preamplifier robust to variations in supply and common-mode

An apparatus comprises a delta-sigma analog-to-digital converter (ADC) and baseband processing circuitry. The delta-sigma ADC includes a plurality of integrator stages connected in series, including a first integrator stage operatively coupled to an input of the delta-sigma ADC; a main quantizer circuit including a main ADC circuit and a main digital-to-analog converter (DAC) circuit, wherein an input to the main ADC circuit is operatively coupled to the plurality of integrator stages; and a first feedback circuit path operatively coupled from an output of the first integrator stage to the input of the delta-sigma ADC, wherein the first feedback circuit path is configured to subtract an output voltage of the first integrator stage from the input of the delta-sigma ADC. The baseband circuitry is configured to activate the first feedback circuit path when detecting that the input voltage increases to cause distortion in the delta-sigma ADC.

Growing community of inventors

Bengaluru, India

Debopam Banerjee