Lsi Corporation

Debjit Roy Choudhury

Srinivasa Rao Kothamasu

Dipankar Das

Dharmesh Kishor Tirthdasani

Varun Shetty

Jean Jacob

Ashank Reddy

Sajith Kizhakke Kalathil Achuthan Kutty

An apparatus for providing a data integrity field implementation in a data processing system includes a controller operative to interface between a host device and a destination device in the data processing system for transferring at least one data block therebetween. The data processing system further includes an error detection module associated with the controller. The error detection module is operative to determine a probability of an error occurrence based at least in part on a measured current error rate for the data processing system. The controller is operative to implement an error correction methodology which is selectively adaptable as a function of the probability of an error occurrence.

Data integrity field (DIF) implementation with error detection and intelligent recovery mechanism

A method and apparatus are provided for mapping addresses between one or more slave devices and at least one corresponding master device in a multilayer interconnect system including a plurality of bus matrices for interfacing between the one or more slave devices and the master device. The method and apparatus are operative for receiving an address map corresponding to the system, receiving information regarding connectivity of one or more slave devices through at least one of the bus matrices, determining whether the master device has more than one default slave unit associated therewith, and, when the master device has more than one default slave unit associated therewith, generating first and second address mappings and configuring the system to have no more than one default slave unit per master device.

Interconnect congestion reduction for memory-mapped peripherals

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West Bengal, India

Debjit Roy Choudhury