Compaq Computer Corporation, Inc.

Dean Tullsen

Joel S Emer

Robert H Halstead, Jr

Henry M Levy

George Z Chrysos

Susan Jane Eggers

Rebecca Stamm

Trggve Fossum

A multi-threaded processor comprising a pipeline including a number of stages processing instructions belonging to a plurality of threads. A buffer stores instructions from different ones of the threads. Count logic stores count information relating to each of the threads to indicate the number of instructions in each of the corresponding threads that have a particular attribute. A selection logic circuit has an output coupled to the buffer to determine which instruction is to be read from the buffer based on the count information stored by the count logic. The count information may, for example, provide information relating to a likelihood that one or more instructions belonging to each of the threads will be cancelled; relating to a count of unresolved branch instructions; or relating to a count of outstanding data cache misses. In operation, a thread may be selected for execution based on a selected attribute to enhance processing performance.

Pipelined multi-thread processor selecting thread instruction in inter-stage buffer based on count information

A technique is provided for selecting a preferred thread from a plurality of threads executing within a simultaneous multithreaded, out-of-order execution computer system, the preferred thread possessing those instructions which, while in flight within the pipeline of the computer system provide, in contrast to those instructions belonging to other threads, a more beneficial performance of the central processing unit of the computer system. To determine the preferred thread, a technique is provided to evaluate attributes of each thread which indicate whether the thread includes a number of instructions which are likely to be cancelled while in flight or whether a thread includes instructions which will remain in the instruction queue for a number of cycles, unable to execute, thus stalling the execution of the thread to which the instruction belongs.

Thread properties attribute vector based thread selection in

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San Diego, CA, United States of America

Dean Tullsen