International Business Machines Corporation

Dean J Burdick

Bret Ronald Olszewski

Vaijayanthimala K Anand

Basu Vaidyanathan

Bruce Gerard Mealey

Vinit Jain

Lance Warren Russell

David Jones Craft

Dirk Michel

Eric Philip Fried

Joaquin Madruga

Suresh Eswara Warrier

Gregory Howard Bellows

Marc Joel Stephenson

James E Carey

Charles J Archer

Philip James Sanders

Mark Richard Nutter

Barry L Minor

Matthew W Markland

Larry Bert Brenner

Luke Matthew Browning

Jason Nathaniel Dale

Gordon G Stewart

Jeffrey M Ceason

Marcos A Villarreal

A method, program product, and system is provided for dynamic virtual processor management in a computer having a plurality of concurrent multi-threaded physical processors. An active logical partition is assigned to one of a plurality of shared processor pools, each shared processor pool having a virtual processor manager mode. A target performance metric for a workload in the active logical partition is compared to a calculated CPU utilization ratio or a calculated response time ratio. The workload in the active logical partition is dynamically moved from the assigned shared processor pool to a logical partition in another of the plurality of shared processor pools based on the target performance metric not being met in the active logical partition, and wherein the logical partition in another of the plurality of shared processor pools is configured to meet the target performance metric.

Dynamic virtual processor manager

A method, program product, and system is provided for dynamic virtual processor management in a computer having a plurality of concurrent multi-threaded physical processors. A workload is assigned to a first virtual processor manager pool based on a virtual processor manager mode of the first virtual processor manager pool. A current utilization ratio and a response time ratio for the workload are calculated. The workload is dynamically moved to a second virtual processor manager pool based on either the current utilization ratio or the response time ratio exceeding a configurable threshold. The workload is dynamically moved between virtual processor manager pools to realize target performance metric requirements.

Mechanisms are provided for dynamically adjusting assignment of software threads to hardware threads in virtual machine (VM) environments. The mechanisms receive, by a virtual machine manager (VMM), an indication of workload priority from a plurality of VMs. The indication indicates a priority of a workload executing on each VM in the plurality of VMs. The mechanisms provide, by the VMM, an indication of physical resource usage to each VM. The indication of physical resource usage is an indication of physical resource usage across all VMs in the plurality of VMs. The mechanisms automatically adjust, by each VM, assignment of corresponding software threads to hardware threads based on the indication of physical resource usage and a priority of a workload executing on the VM to achieve a balance of usage of hardware threads across all VMs in the plurality of VMs.

Closed-loop feedback mechanism for achieving optimum performance in a consolidated workload environment

Terminating an accelerator application program in a hybrid computing environment that includes a host computer having a host computer architecture and an accelerator having an accelerator architecture, where the host computer and the accelerator are adapted to one another for data communications by a system level message passing module ('SLMPM'), and terminating an accelerator application program in a hybrid computing environment includes receiving, by the SLMPM from a host application executing on the host computer, a request to terminate an accelerator application program executing on the accelerator; terminating, by the SLMPM, execution of the accelerator application program; returning, by the SLMPM to the host application, a signal indicating that execution of the accelerator application program was terminated; and performing, by the SLMPM, a cleanup of the execution environment associated with the terminated accelerator application program.

Terminating an accelerator application program in a hybrid computing environment

A computer implemented method, apparatus, and computer usable program code for managing a software partition in logical partitioned data processing system. A virtual root process is created for the software partition, wherein the virtual root process functions as a root process for the software partition. The set of child processes is re-parented to the virtual root process in response to termination of a process having a set of child processes.

Managing an application software partition

A system and method operable to manage misaligned direct memory access (DMA) data transfers is provided. This method involves determining a delta between N bytes of data to be copied from within a local side buffer (source location) to a remote buffer (destination location). After the delta is determined a tail of the same length is copied to temporary storage. Then the N bytes of data on the local side buffer minus the tail will be shifted to align the N bytes of data to be copied from within the local side buffer to the starting address of the destination location in the remote buffer. The pre-shifted N bytes of data within the local side buffer may be DMA transferred to the remote buffer. The tail transferred to temporary storage may then be copied from temporary storage to the remote buffer.

Managing misaligned DMA addresses

A method for implementing a software-managed cache comprises determining an object identifier (ID) for each of a first set of objects of a plurality of objects resident in a local memory, to generate a first cache table, the first cache table comprising a plurality of entries. Each object comprises an object ID and an effective address. The method receives a request for an object, the request comprising an object ID. The method compares the received object ID with the entries in the first cache table. In the event the received object ID matches an entry in the first cache table, the method returns the matching entry in response to the request. In the event the received object ID does not match an entry in the first cache table, the method calculates an effective address in the local memory of the object associated with the object ID.

System and method for a software managed cache in a multiprocessing environment

An approach to profiling software programs that uses a small pinned buffer and a large unpinned histogram buffer is presented. When a process that is being profiled receives a time slice, the process' program counter is written to the small pinned buffer by a kernel routine. The small pinned buffer is configured to be large enough to store several program counters. When the small pinned buffer is full, or almost full, an internal profiling signal is sent by the kernel routine. When the process is resumed, any outstanding signals are processed before resuming the process. The profiling signal is handled by reading the program counters from the small pinned buffer, calculating a slot in the histogram buffer that corresponds to each of the program counters, incrementing the value in the corresponding histogram slots, and clearing the small pinned buffer so that it can be reused.

Scalable and improved profiling of software programs

A method, system and program are provided for dynamically allocating DMA channel identifiers by virtualizing DMA transfer requests into available DMA channel identifiers using a channel bitmap listing of available DMA channels to select and set an allocated DMA channel identifier. Once an input value associated with the DMA transfer request is mapped to the selected DMA channel identifier, the DMA transfer is performed using the selected DMA channel identifier, which is then deallocated in the channel bitmap upon completion of the DMA transfer. When there is a request to wait for completion of the data transfer, the same input value is used with the mapping to wait on the appropriate logical channel. With this method, all available logical channels can be utilized with reduced instances of false-sharing.

Dynamic logical data channel assignment using channel bitmap

A method, system and program are disclosed for automatically adjusting the allocation of a plurality of information processing system (IPS) resources among a plurality of logical partitions (LPARs). An LPAR is created on a first central processor complex (CPC) and a first LPAR identifier is generated. A configuration change manager is implemented on the LPAR to communicate changes in the LPAR's identifier to an automated resource manager (ARM). IPS resources are automatically allocated to the LPAR. If the LPAR is migrated a second CPC, a second LPAR identifier is similarly generated, resulting in an LPAR configuration change event. The ARM is notified that the migrated LPAR's identifier has changed and receives the changed LPAR identifier. Comparison operations are performed to determine whether the second LPAR identifier matches the first CPC. If not, resources allocated to the migrated LPAR are released for automated allocation to other LPARs comprising the first CPC.

Method of automated resource management in a partition migration capable environment

A mechanism is provided for biasing placement of a software thread on a currently idle and dispatched processor. The operating system starts with the last logical processor on which the software thread ran and determines whether that processor is idle and dispatched and considers each logical processor until a currently dispatched and idle logical processor is found. If a currently dispatched and idle logical processor is not found, then the operating system biases placing the software thread on an idle logical processor.

Optimization of thread wake up for shared processor partitions

A mechanism is provided for determining whether to use cache affinity as a criterion for software thread dispatching in a shared processor logical partitioning data processing system. The server firmware may store data about when and/or how often logical processors are dispatched. Given these data, the operating system may collect metrics. Using the logical processor metrics, the operating system may determine whether cache affinity is likely to provide a significant performance benefit relative to the cost of dispatching a particular logical processor to the operating system.

Heuristic based affinity dispatching for shared processor partition dispatching

Embodiments of the invention are associated with an application process that comprises multiple threads, wherein threads of the process are disposes to run on a data processing system, and each thread can have a user mode or a kernel mode machine state, or both, selectively, when it is running. An embodiment directed to a method comprises the steps of allocating a specified memory location for each of the threads, and responsive to a given thread entering a sleep state, selectively saving the kernel mode machine state of the given thread in the specified memory location for the given thread. The saved machine state comprises the state of the given thread immediately prior to the given thread entering the sleep state. In response to detecting a hang condition in the operation of the process, a debugger is attached to the process to access at least one of the saved user mode machine states. The method further includes analyzing information provided by the at least one accessed machine state to determine the cause of the hang condition, and restoring the original state upon detachment, so the debugger attachment is completely transparent to the target process.

Growing community of inventors

Austin, TX, United States of America

Dean J Burdick