Baidu USA LLC

Baidu.com Times Technology (Beijing) Co. Ltd.

Baida USA LLC

Davy Huang

Manjiang Zhang

Tiffany Zhang

Lei Wang

Ji Li

Shuai Wang

Zhen Chen

Xu Zhou

Xing Li

Haofeng Kou

Shengjin Zhou

Mei-Li Chi

Huimeng Zheng

Ruichang Cheng

Lei Lei

Junwei Bao

Wesley M Shao

Min Guo

Xiangtao You

Oh Kwan

Youling Zou

Chongchong Li

Shuangcheng Guo

Bernard Deadman

Xianfei Li

Wendy Lu

Jian Sheng

Andrew Yao

Jia Feng

Hassan Kianinejad

Yanyan Zhang

Krishna Elango

Ran Zhang

Dan N Retter

A system determines a timing matrix corresponding to inference times taken for a number of machine learning (ML) models to be executed by a number of processing resources of a computing device. The processing resources includes at least a first and a second type of processing resources. The system applies a service-specific model-first scheduling scheme or a service-specific hardware-first scheduling scheme to obtain corresponding service-specific mappings. The system determines a best mapping from the corresponding service-specific mappings. The system schedules each of the ML models to a corresponding processing resource from the processing resources according to the best mapping. The system executes the ML models using corresponding mapped processing resources.

Scheduling ML services and models with heterogeneous resources

A system obtains a performance profile corresponding to times taken to perform an inferencing by a machine learning (ML) model using a different number of processing resources from a plurality of processing resources. The system determines one or more groupings of processing resources from the plurality of processing resources, each grouping includes one or more partitions. The system calculates performance speeds corresponding to each grouping based on the performance profile. The system determines a grouping having a best performance speed from the calculated performance speeds. The system partitions the processing resources based on the determined grouping to perform the inferencing.

System on chip parallel computing of ML services and applications for partitioning resources based on the inference times

Methods and systems for generating and utilizing an emulated radar data cube are disclosed. An emulated radar transmission waveform is defined based on expected radar performance. A virtual real world scenario comprising one or more virtual target objects is constructed. The virtual target objects emulate reflection and scattering properties to an input radar wave of real world objects. Operations of radar transmit and receive channels including an antenna array and free space propagation are emulated to obtain emulated raw radar data. Data processing is performed on the emulated raw radar data to build an emulated radar data cube. The emulated radar data cube is utilized to test a radar perception algorithm.

Methods and systems for testing automotive radar using radar data cube emulator

In one embodiment, a system for operating an autonomous driving vehicle (ADV) includes a number of modules. These modules include at least a perception module to perceive a driving environment surrounding the ADV and a planning module to plan a path to drive the ADV to navigate the driving environment. The system further includes a bus coupled to the modules and a sensor processing module communicatively coupled to the modules over the bus. The sensor processing module includes a bus interface coupled to the bus, a sensor interface to be coupled to a first set of one or more sensors mounted on the ADV, a message queue to store messages published by the sensors, and a message handler to manage the messages stored in the message queue. The messages may be subscribed by at least one of the modules to allow the modules to monitor operations of the sensors.

Open and safe monitoring system for autonomous driving platform

A method is disclosed for designing a sparse array for an automotive radar. The method moves each of a number of antenna elements to candidate neighboring grid positions starting from an initial random seed placement to iteratively search for a placement of antenna elements that improves upon a cost function. The cost function for each candidate placement may be determined from characteristics of the FFT response associated with the candidate placement. The method may search for a candidate placement with the lowest cost function among the multiple candidate placements based on the random seed placement. The search may be repeated for a large number of random seed placements to find the candidate placement with the lowest cost function corresponding to each random seed placement. The method may compare the lowest cost functions corresponding to the multiple random seed placements to determine an optimized placement having the minimum cost function.

Sparse array design for automotive radar using particle swarm optimization

A data processing system includes a host system and one or more expansion devices coupled to the host system over a bus. The host system may include one or more processors and a memory storing instructions, which when executed, cause the processors to perform autonomous driving operations to drive an autonomous driving vehicle (ADV). Each expansion device includes a switch device and one or more processing modules coupled to the switch device. Each processing module can be configured to perform at least one of the autonomous driving operations offloaded from the host system. At least one of the processing modules can be configured as a client node to perform an action in response to an instruction received from the host system. Alternatively, it can be configured as a host node to distribute a task to another client node within the expansion device. This host node in the expansion device can further cooperate with the host system via a host-to-host connection.

Autonomous driving computing and storage expansion device with flexible host and client configuration

A method is disclosed for suppressing sidelobes due to artifacts introduced by FFT operations during automotive radar signal processing. Sidelobes of a stronger target from the FFT operations may bury the response from a weaker target when there are multiple targets. The method estimates the sidelobes of an identified target from a measured FFT response and subtracts the estimated sidelobes from the measured FFT response. The identified target may be the strongest target from the measured FFT response. The method estimates the sidelobes to suppress the sidelobes with respect to the peak signal of the identified target. After the estimated sidelobes of the identified target are removed, the updated FFT response may reveal other targets that had been buried. The method may identify additional targets to estimate their sidelobes and may iteratively remove the estimated sidelobes of additional targets from the FFT until a desired sidelobe residual level is achieved.

Sidelobe subtraction method in automotive radar signal processing

A method, apparatus, and system for timing synchronization between multiple computing nodes in an autonomous vehicle host system is disclosed. Timing of a first computing node of an autonomous vehicle host system is calibrated based on an external time source. A first timing message is transmitted from the first computing node to a second computing node of the autonomous vehicle host system via a first communication channel between the first computing node and the second computing node. Timing of the second computing node is calibrated based on the first timing message, wherein immediately subsequent to the calibration of timing of the second computing node, timing of the first computing node and of the second computing node is synchronized.

Time synchronization scheme between different computation nodes in autonomous driving system

In one embodiment, a sensor unit to be utilized in an autonomous driving vehicle (ADV) includes a sensor interface that can be coupled to a number of sensors mounted on a number of different locations of the ADV. The sensor unit further includes a host interface that can be coupled to a host system such as a planning and control system utilized to autonomously drive the vehicle. The sensor unit further includes a number of data transfer modules corresponding to the sensors. Each of the data transfer modules can be configured to operate in one of the operating modes, dependent upon the type of the corresponding sensor. The operating modes include a low latency mode, a high bandwidth mode, and a memory mode.

Data transfer logic for transferring data between sensors and planning and control of an autonomous driving vehicle

The disclosure describes various embodiments for online system-level validation of sensor synchronization. According to an embodiment, an exemplary method of analyzing sensor synchronization in an autonomous driving vehicle (ADV) include the operations of acquiring raw sensor data from a first sensor and a second sensor mounted on the ADV, the raw sensor data describing a target object in a surrounding environment of the ADV; and generating an accuracy map based on the raw sensor data in view of timestamps extracted from the raw sensor data. The method further includes the operations of generating a first bounding box and a second bounding box around the target object using the raw sensor data; and performing an analysis of the first and second bounding boxes and the accuracy map using a predetermined algorithm in view of one or more pre-configured sensor settings to determine whether the first sensor and the second sensor are synchronized with each other.

System for sensor synchronization data analysis in an autonomous driving vehicle

In one embodiment, a system receives, at a sensor unit, a global positioning system (GPS) pulse signal from a GPS sensor of the autonomous driving vehicle (ADV), where the GPS pulse signal is a RF signal transmitted by a satellite to the GPS sensor, where the sensor unit is coupled to a number of sensors mounted on the ADV to perceive a driving environment surrounding the ADV and to plan a path to autonomously drive the ADV. The system receives a first local oscillator signal from a local oscillator. The system synchronizes the first local oscillator signal to the GPS pulse signal in real-time, including modifying the first local oscillator signal based on the GPS pulse signal. The system generates a second oscillator signal based on the synchronized first local oscillator signal, where the second oscillator signal is used to provide a time to at least one of the sensors.

GPS based high precision timestamp generation circuit for an autonomous driving vehicle

An apparatus includes a chassis housing a control server compartment, a compute server compartment, and an input and output (IO) subsystem compartment. The apparatus further includes an IO subsystem inserted into the IO subsystem compartment, a compute server inserted into the compute server compartment, and a control server inserted into the control server compartment coupled to the compute server via an Ethernet connection. The IO subsystem includes one or more IO modules, where at least some of the IO modules can be coupled to sensors. The compute server receives the sensor data from the IO subsystem via some PCIe links and generates planning and control data based on the sensor data for controlling the autonomous vehicle. The control server controls and operates the autonomous vehicle by sending control commands to hardware of the autonomous vehicle based on the planning and control data received from the compute server.

Apparatus for controlling and operating an autonomous vehicle

According to one embodiment, a source code is parsed to identify a first routine to perform a first function and a second routine to perform a second function. A control signaling topology is determined between the first routine and the second routine based on one or more statements associated with the first routine and the second routine defined in the source code. A first logic block is allocated describing a first hardware configuration representing the first function of the first routine. A second logic block is allocated describing a second hardware configuration representing the second function of the second routine. A register-transfer level (RTL) netlist is generated based on the first logic block and the second logic block. The second logic block is to perform the second function dependent upon the first function performed by the first logic block based on the control signaling topology.

Method and system for designing FPGA based on hardware requirements defined in source code

A method for testing peripheral component interconnect express (PCIe) devices is provided. The method implemented at a PCIe testing system detects that one or more PCIe devices have been inserted into one or more PCIe buses of a data processing system. In response to the detection, the PCIe testing system scans all PCIe buses of the data processing system to discover the one or more PCIe devices. For each of the PCIe devices discovered, the PCIe testing system repairs and retrains a PCIe link associated with the PCIe device, without rebooting the data processing system. The PCIe testing system loads a device driver instance for the PCIe device to be hosted by an operating system. The PCIe testing system then executes a test routine to concurrently test the one or more PCIe devices via the respective device driver instances.

Growing community of inventors

Sunnyvale, CA, United States of America

Davy Huang