Leland Stanford Junior University

David Yang

Boyd Fowler

Abbas El Gamal

Abbas A El Gamal

An analog-to-digital conversion scheme allows the conversion of a small dynamic range analog signal into a floating-point, digital representation with a larger dynamic range. A montonically changing analog signal is reset to a reference value at time t&equals;0. The analog signal is then sub-converted by an analog-to-digital converter with maximum input signal level S to corresponding digital representations at several sub-conversion times t&equals;T >T , t&equals;T >T , . . . t&equals;T >T , where T &lE;T. These digital representations are then suitably combined to produce a cumulative, floating-point digital representation which accurately represents the analog signal even if the analog signal has a value greater than S at time t&equals;T.

Method and apparatus for converting a low dynamic range analog signal to a large dynamic range floating-point digital representation

An analog-to-digital conversion scheme allows the conversion of a small dynamic range analog signal into a floating-point, digital representation with a larger dynamic range. A montonically changing analog signal is reset to a reference value at time t&equals;0. The analog signal is then sub-converted by an analog-to-digital converter with maximum input signal level S to corresponding digital representations at several sub-conversion times t&equals;T >T t&equals;T >T , . . . t&equals;T >T , where T &lE;T. These digital representations are then suitably combined to produce a cumulative, floating-point digital representation which accurately represents the analog signal even if the analog signal has a value greater than S at time t&equals;T.

A method for simultaneously performing bit serial analog to digital conversion (ADC) for a potentially very large number of signals is described. The method is ideally suited for performing on chip ADC in area image sensors. In one embodiment, to achieve N-bit precision, the method employs a one-bit comparator per channel (or set of multiplexed channels) and an N-bit DAC. To achieve N bits of precision, 2.sup.N -1 comparisons are sequentially performed. Each comparison is performed by first setting the DAC output to the desired value and then simultaneously comparing each of the pixel values to that value. If a pixel value is greater than the DAC output value, its comparator outputs a one, otherwise it outputs a zero. By appropriately choosing the sequence of comparison values, the pixel values are sequentially generated. In another embodiment, the DAC is omitted and a continuous ramp signal is generated for comparison with the analog input.

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David Yang