National Semiconductor Corporation

Wiretap Ventures, LLC

David Warren Hawley

Scott K Pickett

Matthew Alan Palmer

Andrew Keith Pearce

Roy Liang Chua

Sanjay Popli

Rafael C Camarota

Shankar Moni

Benjamin S Ting

Frederick Furtek

Frederick K Leung

Tim Garverick

Shao-Pin Chen

Jim Sutherland

Venkata Alturi

Arthur Smith, Jr

Shin-Mann Day

In one example, a controller device for a software defined network (SDN) includes one or more network interfaces configured to communicate with network devices of the SDN, and one or more processors configured to obtain data representative of the network devices in the SDN, instantiate software-based controller objects for controllers of the network devices, instantiate software-based switch description objects for switches of the network devices, wherein the software-based switch description objects each comprise data representative of a respective primary controller corresponding to a controller of the one or more controllers, a respective switch identifier, a respective switch media access control (MAC) address, a respective Internet protocol (IP) address, and a respective array of port description objects for each physical port on the respective switch, and managing, via the network interfaces, at least some of the switches using the switch description objects and the controller objects.

Data model for software defined networks

In one example, a controller device for a software defined network (SDN) includes one or more network interfaces configured to communicate with network devices of the SDN, and one or more processors configured to determine a primary path for network traffic between network devices of the SDN, determine a backup path to the primary path for the network traffic between the network devices of the SDN, and, in response to a failover event, configure the network devices to switch from the primary path to the backup path.

High availability for software defined networks

In one example, a controller device for a software defined network (SDN) includes one or more interfaces for communicating with network devices in the software defined network, and one or more processors configured to determine connections between the network devices, determine one or more paths for network traffic between the network devices based on the determination of the connections, and program the network devices to direct network traffic along the one or more paths.

Controller for software defined networks

The present invention is directed to various configuration features of a logic array that includes a plurality of individually configurable logic cells arranged in a matrix. These features include reconfiguration logic for reconfiguring logic cells in a selected portion of the matrix using a window-based protocol. The array also includes configuration data storage means for storing configuration data utilizable for configuring the logic elements, wherein each logic element includes a working data storage register, and reset circuitry for modifying the configuration data without modifying the working data. The array further includes read disable circuitry and write disable circuitry for disabling read access and write access, respectively, to the configuration data. The array further includes a comparison protocol mechanism for checking the configuration data against data on the array pins. The array further includes a configuration circuit for generating external addresses and that can be controlled through a data configuration file fetched from an external storage medium.

Configuration features in a configurable logic array

The present invention provides a configurable logic array that includes a plurality of individually configurable logic cells arranged in a matrix that includes a plurality of horizontal rows of logic cells and a plurality of vertical columns of logic cells. The array further includes at least one horizontally aligned local bus running between adjacent rows of logic cells, the logic cells in the adjacent rows being connectable thereto, and at least one vertically aligned local bus running between adjacent columns of logic cells, the logic cells in the adjacent columns being connectable thereto. The array further includes a dynamic tristate bus driver associated with each logic cell and connectable to the local busses associated with the corresponding logic cell and means for controlling the dynamic tri-state driver through one or more combinations of inputs to the logic cell.

Flexible high impedance control in a cole cell in a configurable logic

A low transistor count programmable bussing resource for a programmable logic array allows the use of the bussing resources as inputs or outputs to a cell in the array and allows connections between different buses without effecting the normal use of the cell. The bussing resource allows efficient routing of signals between cells and is symmetric to allow rotation of logic macros built using combinations of cells and buses.

Versatile and efficient cell-to-local bus interface in a configurable

A programmable logic device is constructed having a novel architecture. A plurality of control input signals are applied to a programmable mapping array in order to generate control functions for data path gating, latching, or modification. The programmable control functions provide flexibility to the designer, while the fixed data path logic is independent of the programmable array. The logic array and data path logic are fabricated on the same integrated circuit, therefore obviating the need for input/output buffers which would be necessary if the device were constructed utilizing discrete components. This enhances the performances of the device. Since the data path does not travel through the array, its performance is not affected by the programmability. If desired, the programmable array can be formed of mask programmable devices, fused programmable devices, or register based circuitry, for example, using RAM cells.

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Belmont, CA, United States of America

David Warren Hawley